[PATCH] D109131: [GlobalISel] Add a store-merging optimization pass and enable for AArch64.

[Jessica Paquette via Phabricator via llvm-commits]

paquette accepted this revision.
paquette added a comment.
This revision is now accepted and ready to land.

I think I basically only have style nits at this point.



================
Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:353
+
+  LLT SmallTy = MRI->getType(Stores[0]->getValueReg());
+  LLT WideValueTy =
----------------
pull `Stores[0]` out into a variable?


================
Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:355
+  LLT WideValueTy =
+      LLT::scalar(Stores.size() * SmallTy.getSizeInBits().getFixedSize());
+
----------------
maybe `Stores.size()` as well?


================
Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:487
+    return false;
+  return std::any_of(C.Stores.begin(), C.Stores.end(),
+                     [&](MachineInstr *OtherMI) {
----------------
why not `llvm::any_of`?


================
Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:531
+  // Check the store is the same size as the existing ones in the candidate.
+  if (MRI->getType(C.Stores[0]->getValueReg()).getSizeInBits() !=
+      ValueTy.getSizeInBits())
----------------
pull `C.Stores[0]` out into a variable?


Repository:
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  https://reviews.llvm.org/D109131/new/

https://reviews.llvm.org/D109131