[PATCH] D107923: [X86] X86DAGToDAGISel::matchBitExtract(): support 'num high bits to clear' pattern

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:3576
+    SDValue BitWidthC =
+        CurDAG->getConstant(NVT.getScalarSizeInBits(), DL, MVT::i32);
+    insertDAGNode(*CurDAG, SDValue(Node, 0), BitWidthC);
----------------
NVT is a scalar isn't it? So this could just be getSizeINBits()?


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Comment at: llvm/test/CodeGen/X86/clear-highbits.ll:943
+; X86-BMI2-NEXT:    movl $32, %eax
+; X86-BMI2-NEXT:    subl %ebx, %eax
+; X86-BMI2-NEXT:    bzhil %eax, {{[0-9]+}}(%esp), %eax
----------------
This doesn't seem better. But maybe it increases parallelism the if the shrxl use wasn't a call?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D107923/new/

https://reviews.llvm.org/D107923