[PATCH] D95116: [PowerPC] Update PC-Relative Load/Store Patterns to use the refactored Load/Store Implementation
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 7 08:11:38 PDT 2021
nemanjai accepted this revision.
nemanjai added a comment.
LGTM other than a couple of minor nits.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:17240
+static bool isPCRelNode(SDValue N) {
+ if (N.getOpcode() == PPCISD::MAT_PCREL_ADDR ||
+ isValidPCRelNode<ConstantPoolSDNode>(N) ||
----------------
Nit: please avoid the
```
if (condition)
return true;
return false;
```
idiom. This is simply `return condition;`
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:17494
+ Disp = N;
+ break;
+ }
----------------
I realize that we don't really use `Base` but we should either note that in a comment or just set it to some value that means "we don't care".
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.td:1156
// PC Relative Address
def pcreladdr : ComplexPattern<iPTR, 1, "SelectAddrPCRel", [], []>;
----------------
Is this no longer needed?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D95116/new/
https://reviews.llvm.org/D95116
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