[PATCH] D109148: [DAGCombiner][VP] Fold zero-length or false-masked VP ops

Mon Sep 6 05:15:11 PDT 2021

frasercrmck marked 2 inline comments as done.
frasercrmck added inline comments.

================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:22044
+    break;
+  case ISD::VP_ADD:
+  case ISD::VP_AND:
----------------
simoll wrote:
> You could use the property macros in `include/llvm/IR/VPIntrinsics.def` for this intead.
> Eg, define `ISD::isVPBinaryOp(ISD)` amd `ISD::isVPReductionOP(ISD)` and use them here.
All good ideas, thank you. I've added those now. I slightly changed the macros from `HANDLE_` to `PROPERTY` since they're not currently being used to "handle" anything: they just flag an opcode as having a certain property.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109148/new/

https://reviews.llvm.org/D109148