[PATCH] D109052: [AMDGPU][GlobalISel] Fix waterfall loops

[Sebastian Neubauer via Phabricator via llvm-commits]

sebastian-ne added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:3142-3146
+    while (Start->getOpcode() != FrameSetupOpcode)
+      --Start;
+    MachineBasicBlock::iterator End(&MI);
+    while (End->getOpcode() != FrameDestroyOpcode)
+      ++End;
----------------
arsenm wrote:
> I'm not sure you can guarantee this is the range that needs to be moved. Could other instructions have been moved across these between the IRTranslator and here?
The running passes seem to be
- IRTranslator
- AMDGPUPreLegalizerCombiner
- Localizer
- Legalizer
- AMDGPUPostLegalizerCombiner
- RegBankSelect

It’s fine if VALU instructions are moved inside the loop, but SALU instructions would be a problem.

Can we prevent instructions from being moved into the call code?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109052/new/

https://reviews.llvm.org/D109052