[PATCH] D109300: [AMDGPU] Make vector super classes allocatable

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas created this revision.
cdevadas added reviewers: arsenm, rampitec.
Herald added subscribers: foad, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
cdevadas requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

The combined vector register classes with both
VGPRs and AGPRs are now unallocatable. This patch
turns them into allocatable as a prerequisite to
enable vgpr to agpr copy during regalloc.

Also, added the missing AV register classes from
192b to 1024b.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D109300

Files:
  llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
  llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.td
  llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
  llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll

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