[llvm] 2886802 - [M68k][test] Migrate the remaining fixup and relaxation tests
Min-Yih Hsu via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 4 16:36:53 PDT 2021
Author: Min-Yih Hsu
Date: 2021-09-04T16:27:13-07:00
New Revision: 28868027f7529ba3de7f16a53710e7dae5d6f6ae
URL: https://github.com/llvm/llvm-project/commit/28868027f7529ba3de7f16a53710e7dae5d6f6ae
DIFF: https://github.com/llvm/llvm-project/commit/28868027f7529ba3de7f16a53710e7dae5d6f6ae.diff
LOG: [M68k][test] Migrate the remaining fixup and relaxation tests
Migrate the tests regarding fixup and relaxation on branch and call
targets.
This patch wraps up the migration from `test/CodeGen/M68k/Encoding` to
`test/MC/M68k`.
Added:
llvm/test/MC/M68k/Control/branch-pc-rel.s
llvm/test/MC/M68k/Control/call-pc-rel.s
llvm/test/MC/M68k/Relaxations/branch.s
Modified:
Removed:
llvm/test/CodeGen/M68k/Encoding/Control/branch-pc-rel.mir
llvm/test/CodeGen/M68k/Encoding/Control/call-pc-rel.mir
llvm/test/CodeGen/M68k/Encoding/README.md
llvm/test/CodeGen/M68k/Encoding/Relaxations/branch.mir
################################################################################
diff --git a/llvm/test/CodeGen/M68k/Encoding/Control/branch-pc-rel.mir b/llvm/test/CodeGen/M68k/Encoding/Control/branch-pc-rel.mir
deleted file mode 100644
index 7f7e160ed6cf..000000000000
--- a/llvm/test/CodeGen/M68k/Encoding/Control/branch-pc-rel.mir
+++ /dev/null
@@ -1,31 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj \
-# RUN: -code-model=small -relocation-model=pic -o - \
-# RUN: | extract-section .text -h \
-# RUN: | FileCheck %s
-
-#------------------------------------------------------------------------------
-# This test checks whether branches have correct offset
-#------------------------------------------------------------------------------
-
---- # TEXT
-# 0 CHECK: 6702
-# 2 CHECK-SAME: 6008
-# 4 CHECK-SAME: d0bc 0000 0000
-# A CHECK-SAME: 4e75
-# C CHECK-SAME: d0bc 0000 0001
-# 12 CHECK-SAME: 4e75
-name: TEXT
-body: |
- bb.0:
- successors: %bb.2,%bb.1
-
- Beq8 %bb.1, implicit $ccr
- BRA8 %bb.2
- bb.1:
- $d0 = ADD32di $d0, 0, implicit-def $ccr
- RET 0, $d0
- bb.2:
- $d0 = ADD32di $d0, 1, implicit-def $ccr
- RET 0, $d0
-
-...
diff --git a/llvm/test/CodeGen/M68k/Encoding/Control/call-pc-rel.mir b/llvm/test/CodeGen/M68k/Encoding/Control/call-pc-rel.mir
deleted file mode 100644
index d4ea2dc76c24..000000000000
--- a/llvm/test/CodeGen/M68k/Encoding/Control/call-pc-rel.mir
+++ /dev/null
@@ -1,66 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj \
-# RUN: -code-model=small -relocation-model=pic -o - \
-# RUN: | extract-section .text -h \
-# RUN: | FileCheck %s
-
-#------------------------------------------------------------------------------
-# Tests PC-Relative Calls' offsets. The rest requires relocation and tested
-# appropriately elsewhere.
-#------------------------------------------------------------------------------
-
-#
-# <BACKWARD>
-# 00 CHECK: 4e71
-# 02 CHECK-SAME: 4e75
-#
-# <PCI>
-# 04 CHECK-SAME: 4ebb 08fa
-# 08 CHECK-SAME: 4ebb 080a
-#
-# <PCD>
-# 0c CHECK-SAME: 4eba fff2
-# 10 CHECK-SAME: 4eba 0002
-#
-# <FORWARD>
-# 14 CHECK-SAME: 4e71
-# 16 CHECK-SAME: 4e75
---- |
-
- define dso_local void @BACKWARD() { entry: ret void }
- define dso_local void @PCI() { entry: ret void }
- define dso_local void @PCD() { entry: ret void }
- define dso_local void @FORWARD() { entry: ret void }
-
-...
---- # BACKWARD
-name: BACKWARD
-body: |
- bb.0:
- NOP
- RTS
-
-...
---- # PCI
-name: PCI
-body: |
- bb.0:
- CALLk @BACKWARD, $d0
- CALLk @FORWARD, $d0
-
-...
---- # PCD
-name: PCD
-body: |
- bb.0:
- CALLq @BACKWARD
- CALLq @FORWARD
-
-...
---- # FORWARD
-name: FORWARD
-body: |
- bb.0:
- NOP
- RTS
-
-...
diff --git a/llvm/test/CodeGen/M68k/Encoding/README.md b/llvm/test/CodeGen/M68k/Encoding/README.md
deleted file mode 100644
index d6c50b813b32..000000000000
--- a/llvm/test/CodeGen/M68k/Encoding/README.md
+++ /dev/null
@@ -1,16 +0,0 @@
-# OBJECT CODE TESTS
-NOTE: This folder will be moved to llvm/test/MC/M68k when the integrated assembler
-is finished (currently the AsmParser is not implemented yet).
-
-## Purpose
-These test snippets are to test object code generation features, specifically
-lowering of MxBean encoding, Relocations and specific commands encoding classes.
-
-### MxBean
-TODO
-
-### Relocations
-TODO
-
-### Encoding Classes
-TODO
diff --git a/llvm/test/CodeGen/M68k/Encoding/Relaxations/branch.mir b/llvm/test/CodeGen/M68k/Encoding/Relaxations/branch.mir
deleted file mode 100644
index 73f2fdda4684..000000000000
--- a/llvm/test/CodeGen/M68k/Encoding/Relaxations/branch.mir
+++ /dev/null
@@ -1,114 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj \
-# RUN: -code-model=small -relocation-model=pic -o - \
-# RUN: | extract-section .text -h \
-# RUN: | FileCheck %s
-
-#------------------------------------------------------------------------------
-# Test branch relaxation. By default codegen choses smallest branch instruction,
-# during object code generation it might get clear that offset does not fit and
-# bigger instruction is required.
-#------------------------------------------------------------------------------
-
-
---- # TIGHT
-# The offset for the small branch is from the PC value, which points to the
-# next instruction, because there is no extension word here.
-# 000 CHECK: 6078
-# 002 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 00C CHECK-SAME: 23f9 0000 0000 0000 0000
-# 016 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 020 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 02A CHECK-SAME: 23f9 0000 0000 0000 0000
-# 034 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 03E CHECK-SAME: 23f9 0000 0000 0000 0000
-# 048 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 052 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 05C CHECK-SAME: 23f9 0000 0000 0000 0000
-# 066 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 070 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 07A CHECK-SAME: d0bc 0000 0000
-# 080 CHECK-SAME: 4e75
-name: TIGHT
-body: |
- bb.0:
- successors: %bb.2
-
- BRA8 %bb.2
- bb.1:
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- bb.2:
- $d0 = ADD32di $d0, 0, implicit-def $ccr
- RET 0, $d0
-
-...
---- # RELAXED
-# 084 CHECK-SAME 6000 0084
-# 088 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 092 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 09C CHECK-SAME: 23f9 0000 0000 0000 0000
-# 0A6 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 0B0 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 0BA CHECK-SAME: 23f9 0000 0000 0000 0000
-# 0C4 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 0CE CHECK-SAME: 23f9 0000 0000 0000 0000
-# 0D8 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 0E2 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 0EC CHECK-SAME: 23f9 0000 0000 0000 0000
-# 0F6 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 100 CHECK-SAME: 23f9 0000 0000 0000 0000
-# 10A CHECK-SAME: d0bc 0000 0000
-# 110 CHECK-SAME: 4e75
-name: RELAXED
-body: |
- bb.0:
- successors: %bb.2
-
- BRA8 %bb.2
- bb.1:
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- MOV32bb 0, 0, implicit-def $ccr
- bb.2:
- $d0 = ADD32di $d0, 0, implicit-def $ccr
- RET 0, $d0
-
-...
---- # ZERO
-# Because of the way M68k encodes branches it is not possible to encode 0
-# offset with the smallest insruction(0 in the offset field means exension word
-# is used) thus we switch to the wider instruction.
-# 114 CHECK-SAME: 6000 0002
-# 118 CHECK-SAME: d0bc 0000 0000
-# 11E CHECK-SAME: 4e75
-name: ZERO
-body: |
- bb.0:
- successors: %bb.1
-
- BRA8 %bb.1
- bb.1:
- $d0 = ADD32di $d0, 0, implicit-def $ccr
- RET 0, $d0
-
-...
diff --git a/llvm/test/MC/M68k/Control/branch-pc-rel.s b/llvm/test/MC/M68k/Control/branch-pc-rel.s
new file mode 100644
index 000000000000..d0126c36e16d
--- /dev/null
+++ b/llvm/test/MC/M68k/Control/branch-pc-rel.s
@@ -0,0 +1,25 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+
+ ; CHECK: beq .LBB0_1
+ ; CHECK-SAME: encoding: [0x67,A]
+ ; CHECK: fixup A - offset: 1, value: .LBB0_1-1, kind: FK_PCRel_1
+ beq .LBB0_1
+ ; CHECK: bra .LBB0_2
+ ; CHECK-SAME: encoding: [0x60,A]
+ ; CHECK: fixup A - offset: 1, value: .LBB0_2-1, kind: FK_PCRel_1
+ bra .LBB0_2
+.LBB0_1:
+ ; CHECK: add.l #0, %d0
+ ; CHECK-SAME: encoding: [0xd0,0xbc,0x00,0x00,0x00,0x00]
+ add.l #0, %d0
+ ; CHECK: rts
+ ; CHECK-SAME: encoding: [0x4e,0x75]
+ rts
+.LBB0_2:
+ ; CHECK: add.l #1, %d0
+ ; CHECK-SAME: encoding: [0xd0,0xbc,0x00,0x00,0x00,0x01]
+ add.l #1, %d0
+ ; CHECK: rts
+ ; CHECK-SAME: encoding: [0x4e,0x75]
+ rts
+
diff --git a/llvm/test/MC/M68k/Control/call-pc-rel.s b/llvm/test/MC/M68k/Control/call-pc-rel.s
new file mode 100644
index 000000000000..be5afad26545
--- /dev/null
+++ b/llvm/test/MC/M68k/Control/call-pc-rel.s
@@ -0,0 +1,48 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+; RUN: llvm-mc -triple=m68k -filetype=obj < %s | \
+; RUN: llvm-objdump -d - | FileCheck --check-prefix=CHECK-OBJ %s
+
+; CHECK-LABEL: BACKWARD:
+BACKWARD:
+ ; CHECK: nop
+ ; CHECK-SAME: encoding: [0x4e,0x71]
+ nop
+ ; CHECK: rts
+ ; CHECK-SAME: encoding: [0x4e,0x75]
+ rts
+
+; CHECK-LABEL: PCI:
+PCI:
+ ; CHECK: jsr (BACKWARD,%pc,%d0)
+ ; CHECK-OBJ: jsr (250,%pc,%d0)
+ ; CHECK-SAME: encoding: [0x4e,0xbb,0x08,A]
+ ; CHECK: fixup A - offset: 3, value: BACKWARD+1, kind: FK_PCRel_1
+ jsr (BACKWARD,%pc,%d0)
+ ; CHECK: jsr (FORWARD,%pc,%d0)
+ ; CHECK-OBJ: jsr (10,%pc,%d0)
+ ; CHECK-SAME: encoding: [0x4e,0xbb,0x08,A]
+ ; CHECK: fixup A - offset: 3, value: FORWARD+1, kind: FK_PCRel_1
+ jsr (FORWARD,%pc,%d0)
+
+; CHECK-LABEL: PCD:
+PCD:
+ ; CHECK: jsr (BACKWARD,%pc)
+ ; CHECK-OBJ: jsr (65522,%pc)
+ ; CHECK-SAME: encoding: [0x4e,0xba,A,A]
+ ; CHECK: fixup A - offset: 2, value: BACKWARD, kind: FK_PCRel_2
+ jsr (BACKWARD,%pc)
+ ; CHECK: jsr (FORWARD,%pc)
+ ; CHECK-OBJ: jsr (2,%pc)
+ ; CHECK-SAME: encoding: [0x4e,0xba,A,A]
+ ; CHECK: fixup A - offset: 2, value: FORWARD, kind: FK_PCRel_2
+ jsr (FORWARD,%pc)
+
+; CHECK-LABEL: FORWARD:
+FORWARD:
+ ; CHECK: nop
+ ; CHECK-SAME: encoding: [0x4e,0x71]
+ nop
+ ; CHECK: rts
+ ; CHECK-SAME: encoding: [0x4e,0x75]
+ rts
+
diff --git a/llvm/test/MC/M68k/Relaxations/branch.s b/llvm/test/MC/M68k/Relaxations/branch.s
new file mode 100644
index 000000000000..d9b47b36986e
--- /dev/null
+++ b/llvm/test/MC/M68k/Relaxations/branch.s
@@ -0,0 +1,52 @@
+; RUN: llvm-mc -triple=m68k -motorola-integers -filetype=obj < %s \
+; RUN: | llvm-objdump -d - | FileCheck %s
+
+; CHECK-LABEL: <TIGHT>:
+TIGHT:
+ ; CHECK: bra $78
+ bra .LBB0_2
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+.LBB0_2:
+ add.l #0, %d0
+ rts
+
+; CHECK-LABEL: <RELAXED>:
+RELAXED:
+ ; CHECK: bra $84
+ bra .LBB1_2
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+ move.l $0, $0
+.LBB1_2:
+ add.l #0, %d0
+ rts
+
+; CHECK-LABEL: <ZERO>:
+ZERO:
+ ; CHECK: bra $2
+ bra .LBB2_1
+.LBB2_1:
+ add.l #0, %d0
+ rts
+
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