[PATCH] D109116: [RISCV] Change how we encode AVL operands in vector pseudoinstructions to use GPRNoX0.

[Craig Topper via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG75620fadf5c3: [RISCV] Change how we encode AVL operands in vector pseudoinstructions to use… (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109116/new/

https://reviews.llvm.org/D109116

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
  llvm/test/CodeGen/RISCV/rvv/commuted-op-indices-regression.mir
  llvm/test/CodeGen/RISCV/rvv/tail-agnostic-impdef-copy.mir
  llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
  llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
  llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir

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