[PATCH] D109155: [InstCombine] Fold BW/2+1 tops bits are same pattern
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 3 08:18:04 PDT 2021
spatel added a comment.
In D109155#2982330 <https://reviews.llvm.org/D109155#2982330>, @foad wrote:
> In D109155#2982324 <https://reviews.llvm.org/D109155#2982324>, @spatel wrote:
>
>> The half-width truncate clause seems too restrictive. I assume we want to catch a case like this too:
>> https://alive2.llvm.org/ce/z/UAQ4yQ
>
> What does `ashr i8 %t2, 25` do in that example? Surely it's poison?
Yes, that was all wrong. If we're not doing a half-width truncate, the bits aren't lined up consecutively, so it probably doesn't matter:
https://alive2.llvm.org/ce/z/YdoXeg
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https://reviews.llvm.org/D109155/new/
https://reviews.llvm.org/D109155
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