[PATCH] D109106: [ISEL][BitTestBlock] pre-commit test for D109103

[Hans Wennborg via Phabricator via llvm-commits]

hans added inline comments.


================
Comment at: llvm/test/CodeGen/X86/switch-bit-test-unreachable-default.ll:6
+; RUN:   -stop-after=finalize-isel %s -o /dev/null 2>&1 | \
+; RUN:   FileCheck %s --check-prefix=CHECK-GISEL
+
----------------
nickdesaulniers wrote:
> Is adding this much MIR withought llvm/utils/update_mir_test_checks.py being runable frowned upon?
> 
> llvm/utils/update_mir_test_checks.py doesn't work for this test, as written.
I don't know, but why are you doing MIR checks instead of the final assembly, which should be less verbose and therefore hopefully more robust?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109106/new/

https://reviews.llvm.org/D109106