[llvm] 90d5298 - [GlobalISel] Add convenience constructors to MemDesc
Konstantin Schwarz via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 3 03:52:49 PDT 2021
Author: Konstantin Schwarz
Date: 2021-09-03T12:52:18+02:00
New Revision: 90d52987594e09940110062a4bf3a4cd6f77f774
URL: https://github.com/llvm/llvm-project/commit/90d52987594e09940110062a4bf3a4cd6f77f774
DIFF: https://github.com/llvm/llvm-project/commit/90d52987594e09940110062a4bf3a4cd6f77f774.diff
LOG: [GlobalISel] Add convenience constructors to MemDesc
This allows constructing a MemDesc from a MachineMemoryOperand, a pattern that starts to show up more frequently.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D109161
Added:
Modified:
llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
index 4fdfabbfb1612..5a50779471076 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
@@ -113,6 +113,14 @@ struct LegalityQuery {
LLT MemoryTy;
uint64_t AlignInBits;
AtomicOrdering Ordering;
+
+ MemDesc() = default;
+ MemDesc(LLT MemoryTy, uint64_t AlignInBits, AtomicOrdering Ordering)
+ : MemoryTy(MemoryTy), AlignInBits(AlignInBits), Ordering(Ordering) {}
+ MemDesc(const MachineMemOperand &MMO)
+ : MemoryTy(MMO.getMemoryType()),
+ AlignInBits(MMO.getAlign().value() * 8),
+ Ordering(MMO.getSuccessOrdering()) {}
};
/// Operations which require memory can use this to place requirements on the
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index cd363d7d449c6..9a781e355cbac 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -497,10 +497,7 @@ bool CombinerHelper::matchCombineExtendingLoads(MachineInstr &MI,
continue;
// Check for legality.
if (LI) {
- LegalityQuery::MemDesc MMDesc;
- MMDesc.MemoryTy = MMO.getMemoryType();
- MMDesc.AlignInBits = MMO.getAlign().value() * 8;
- MMDesc.Ordering = MMO.getSuccessOrdering();
+ LegalityQuery::MemDesc MMDesc(MMO);
LLT UseTy = MRI.getType(UseMI.getOperand(0).getReg());
LLT SrcTy = MRI.getType(LoadMI->getPointerReg());
if (LI->getAction({LoadMI->getOpcode(), {UseTy, SrcTy}, {MMDesc}})
@@ -724,10 +721,8 @@ bool CombinerHelper::matchSextInRegOfLoad(
return false;
const MachineMemOperand &MMO = LoadDef->getMMO();
- LegalityQuery::MemDesc MMDesc;
+ LegalityQuery::MemDesc MMDesc(MMO);
MMDesc.MemoryTy = LLT::scalar(NewSizeBits);
- MMDesc.AlignInBits = MMO.getAlign().value() * 8;
- MMDesc.Ordering = MMO.getSuccessOrdering();
if (!isLegalOrBeforeLegalizer({TargetOpcode::G_SEXTLOAD,
{MRI.getType(LoadDef->getDstReg()),
MRI.getType(LoadDef->getPointerReg())},
@@ -3758,10 +3753,8 @@ bool CombinerHelper::matchLoadOrCombine(
// may not use index 0.
Register Ptr = LowestIdxLoad->getPointerReg();
const MachineMemOperand &MMO = LowestIdxLoad->getMMO();
- LegalityQuery::MemDesc MMDesc;
+ LegalityQuery::MemDesc MMDesc(MMO);
MMDesc.MemoryTy = Ty;
- MMDesc.AlignInBits = MMO.getAlign().value() * 8;
- MMDesc.Ordering = MMO.getSuccessOrdering();
if (!isLegalOrBeforeLegalizer(
{TargetOpcode::G_LOAD, {Ty, MRI.getType(Ptr)}, {MMDesc}}))
return false;
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
index 3e3141657e87a..30697913a6a44 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
@@ -352,8 +352,7 @@ LegalizerInfo::getAction(const MachineInstr &MI,
SmallVector<LegalityQuery::MemDesc, 2> MemDescrs;
for (const auto &MMO : MI.memoperands())
- MemDescrs.push_back({MMO->getMemoryType(), 8 * MMO->getAlign().value(),
- MMO->getSuccessOrdering()});
+ MemDescrs.push_back({*MMO});
return getAction({MI.getOpcode(), Types, MemDescrs});
}
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