[PATCH] D109131: [GlobalISel] Add a store-merging optimization pass and enable for AArch64.

[Jessica Paquette via Phabricator via llvm-commits]

paquette added inline comments.


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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:284
+/// forces a boundary between store merge candidates.
+static bool isInstHardMergeHazard(MachineInstr &MI) {
+  return MI.hasUnmodeledSideEffects() || MI.hasOrderedMemoryRef();
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might as well be const?


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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:318
+          TLI->canMergeStoresTo(AS, StoreEVT, *MF) &&
+          (TLI->isTypeLegal(StoreEVT)/* || isTruncStoreLegal()*/))
+        break; // We can generate a MergeSize bits store.
----------------
is the commented out code here intentional?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109131/new/

https://reviews.llvm.org/D109131