[PATCH] D108961: [RISCV] MC relaxation for out-of-range conditional branch.

[Fangrui Song via Phabricator via llvm-commits]

MaskRay added a comment.

Some objection from me.

x86 does have such a relaxation (breaking WYSIWYG), but this is not a thing that any other RISC arch I know does.
thumb1 has a short range (+-256) as well, but it doesn't use assembler relaxation:

  # thumb: Error: branch out of range
  .thumb
  beq .Lfoo
  .rept 129
  nop
  .endr
  .Lfoo:

RISCV already uses lib/CodeGen/BranchRelaxation.cpp on the compiler side, so I am not sure why we need this assembler side solution.

https://gcc.gnu.org/onlinedocs/gcc/Size-of-an-asm.html#Size-of-an-asm says 
"It does this by counting the number of instructions in the pattern of the asm "
Multiple RISC ports use this. If GCC RISCV doesn't this, it should be fixed.

For completeness, such long branches are typically not performance bottleneck.
Even if linker relaxation can shorten the distance a bit and allow more short-form branches,
it may not worth the complexity.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D108961