[PATCH] D109131: [GlobalISel] Add a store-merging optimization pass and enable for AArch64.
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 2 10:04:50 PDT 2021
arsenm added inline comments.
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Comment at: llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h:38
+ Register IndexReg;
+ Optional<int64_t> Offset;
+ bool IsIndexSignExt = false;
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Why Optional? Isn't 0 naturally good enough?
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:65
+ MRI = &MF.getRegInfo();
+ TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(MF.getFunction());
+ AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
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Don't know what you would want TTI for in a MIR pass, but this is unused
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:114
+
+ if (!(BasePtr0.BaseReg.isValid() && BasePtr1.BaseReg.isValid()))
+ return false;
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Demorgan this?
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:188
+
+bool GISelAddressing::instMayAlias(const MachineInstr &MI,
+ const MachineInstr &Other,
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This function seems to largely be recreating MachineInstr::mayAlias
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:197
+ int64_t Offset;
+ Optional<int64_t> NumBytes;
+ MachineMemOperand *MMO;
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Optional seems like overkill, 0 size is naturally a missing size
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:271
+ int64_t Overlap1 = *Size1 + SrcValOffset1 - MinOffset;
+ if (AA->isNoAlias(MemoryLocation(MUC0.MMO->getValue(), Overlap0,
+ MUC0.MMO->getAAInfo()),
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Similar to the change in 9d720dcb89e8da4d12aa1832d74614adc6aa2c82, should this use getModRefInfo instead of isNoAlias?
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:298
+ const auto &LegalSizes = LegalStoreSizes[AS];
+ const auto &TLI = MF->getSubtarget().getTargetLowering();
+
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Cache this in the class?
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:305
+
+ auto DL = MF->getFunction().getParent()->getDataLayout();
+ bool AnyMerged = false;
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This should be a const reference
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:337
+ MachineFunction &MF) const {
+ const auto &LI = MF.getSubtarget().getLegalizerInfo();
+ auto Action = LI->getAction(Query).Action;
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Cache this in the class?
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:381
+ auto *WideMMO = MF->getMachineMemOperand(&Stores[0]->getMMO(), 0,
+ WideValueTy.getSizeInBytes());
+ if (!ConstantVals.empty()) {
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Should directly pass WideValueTy, the memory operands track the type now
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:396-399
+ // Mimic the SDAG behaviour here and don't try to do anything for unknown
+ // values. In future, we should also support the cases of loads and
+ // extracted vector elements.
+ return false;
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Invert condition and unindent the if case?
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:624
+ const auto &LI = *MF->getSubtarget().getLegalizerInfo();
+ LLT PtrTy = LLT::pointer(AddrSpace, 64);
+ // We assume that we're not going to be generating any stores wider than
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Assuming the pointer size is 64, need to query for this
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:630
+ SmallVector<LegalityQuery::MemDesc, 2> MemDescrs(
+ {{Ty, Ty.getSizeInBits(), AtomicOrdering::NotAtomic}});
+ SmallVector<LLT> StoreTys({Ty, PtrTy});
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I guess this is just ignoring alignment?
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Comment at: llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp:647-649
+ // Don't run the pass if the target asked so.
+ if (DoNotRunPass(MF))
+ return false;
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Wouldn't the target just not add the pass to the pipeline?
Repository:
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CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D109131/new/
https://reviews.llvm.org/D109131
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