[PATCH] D108886: Add RISC-V sifive-s51 cpu

[Evandro Menezes via Phabricator via llvm-commits]

evandro added a comment.

In D108886#2978038 <https://reviews.llvm.org/D108886#2978038>, @apivovarov wrote:

> Evandro, similar notes have been made in the past for Release Notes 12.x and 11.x for Arm and RISC-V processors:
> https://github.com/llvm/llvm-project/blob/release/12.x/clang/docs/ReleaseNotes.rst#modified-compiler-flags
> https://github.com/llvm/llvm-project/blob/release/11.x/clang/docs/ReleaseNotes.rst#modified-compiler-flags

Exactly, but they were not similar changes, but more significant ones, including the addition pipeline models.  But I don't feel strongly about it.


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