[PATCH] D109001: [AArch64] Fold an sqadd of a sqdmull at lane 0 into an sqdmlal

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1205
+
+  def : Pat<(i32 (int_aarch64_neon_sqadd (i32 FPR32Op:$Rd),
+                  (i32 (vector_extract (v4i32 (int_aarch64_neon_sqdmull
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There should probably be other types to this? Not just v4i16.
And it doesn't look like it should be in the SVE file.
>From looking around, it appears most of the other patterns are in SIMDIndexedLongSQDMLXSDTied.

But if this is from a scalar intrinsic, should it be producing a scalar sqdmlal?


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  https://reviews.llvm.org/D109001/new/

https://reviews.llvm.org/D109001