[PATCH] D108936: [PPCISelLowering] avoid emitting libcalls to __mulodi4()

[Nick Desaulniers via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd8b6ae072d77: [PPCISelLowering] avoid emitting libcalls to __mulodi4() (authored by nickdesaulniers).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108936/new/

https://reviews.llvm.org/D108936

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/overflow-intrinsic-optimizations.ll


Index: llvm/test/CodeGen/PowerPC/overflow-intrinsic-optimizations.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/overflow-intrinsic-optimizations.ll
@@ -0,0 +1,19 @@
+; RUN: llc %s -mtriple=powerpc -o - | FileCheck %s
+
+define i1 @no__mulodi4(i32 %a, i64 %b, i32* %c) {
+; CHECK-LABEL: no__mulodi4
+; CHECK-NOT: bl __mulodi4
+entry:
+  %0 = sext i32 %a to i64
+  %1 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %0, i64 %b)
+  %2 = extractvalue { i64, i1 } %1, 1
+  %3 = extractvalue { i64, i1 } %1, 0
+  %4 = trunc i64 %3 to i32
+  %5 = sext i32 %4 to i64
+  %6 = icmp ne i64 %3, %5
+  %7 = or i1 %2, %6
+  store i32 %4, i32* %c, align 4
+  ret i1 %7
+}
+
+declare { i64, i1 } @llvm.smul.with.overflow.i64(i64, i64)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1301,6 +1301,7 @@
     setLibcallName(RTLIB::SHL_I128, nullptr);
     setLibcallName(RTLIB::SRL_I128, nullptr);
     setLibcallName(RTLIB::SRA_I128, nullptr);
+    setLibcallName(RTLIB::MULO_I64, nullptr);
   }
 
   if (!isPPC64)


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