[PATCH] D108962: [docs] [NFC] Clarify the datalayout documentation

[William Woodruff via Phabricator via llvm-commits]

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This patch fixes a couple of small oversights in the documentation for the `datalayout` specification:

- The `v` and `f` specifications are subject to the same constraints on `<size>` as `i` is.
- The `p[n]` specification didn't mark `<idx>` as optional, despite being documented and parsed as such.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108962

Files:
  llvm/docs/LangRef.rst


Index: llvm/docs/LangRef.rst
===================================================================
--- llvm/docs/LangRef.rst
+++ llvm/docs/LangRef.rst
@@ -2556,7 +2556,7 @@
 ``A<address space>``
     Specifies the address space of objects created by '``alloca``'.
     Defaults to the default address space of 0.
-``p[n]:<size>:<abi>:<pref>:<idx>``
+``p[n]:<size>:<abi>:<pref>[:<idx>]``
     This specifies the *size* of a pointer and its ``<abi>`` and
     ``<pref>``\erred alignments for address space ``n``. The fourth parameter
     ``<idx>`` is a size of index that used for address calculation. If not
@@ -2569,13 +2569,13 @@
     ``<size>``. The value of ``<size>`` must be in the range [1,2^23).
 ``v<size>:<abi>:<pref>``
     This specifies the alignment for a vector type of a given bit
-    ``<size>``.
+    ``<size>``. The value of ``<size>`` must be in the range [1,2^23).
 ``f<size>:<abi>:<pref>``
     This specifies the alignment for a floating-point type of a given bit
     ``<size>``. Only values of ``<size>`` that are supported by the target
     will work. 32 (float) and 64 (double) are supported on all targets; 80
     or 128 (different flavors of long double) are also supported on some
-    targets.
+    targets. The value of ``<size>`` must be in the range [1,2^23).
 ``a:<abi>:<pref>``
     This specifies the alignment for an object of aggregate type.
 ``F<type><abi>``


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