[PATCH] D108830: [AMDGPU] Propagate defining src reg for AGPR to AGPR Copys
Vang Thao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 30 10:13:10 PDT 2021
vangthao added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp:201
+ if (Def.getOpcode() == AMDGPU::V_ACCVGPR_WRITE_B32_e64) {
+ MachineOperand DefSrcMO = Def.getOperand(1);
+
----------------
arsenm wrote:
> I'm worried this might not work correctly with overlapping subregisters
> I'm worried this might not work correctly with overlapping subregisters
I added some new tests. Do they address this? If not can you give an example?
================
Comment at: llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp:211-214
+ LIS->removeInterval(DefSrcMO.getReg());
+ LIS->removeInterval(SrcReg);
+ LIS->createAndComputeVirtRegInterval(DefSrcMO.getReg());
+ LIS->createAndComputeVirtRegInterval(SrcReg);
----------------
arsenm wrote:
> Should not need to totally trash the liveness and start over
> Should not need to totally trash the liveness and start over
Is there a way to update the liveness without trashing it?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D108830/new/
https://reviews.llvm.org/D108830
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