[llvm] 668b045 - [LSR][NFC] Add test case for pr42770
Danila Malyutin via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 30 08:47:03 PDT 2021
Author: Danila Malyutin
Date: 2021-08-30T18:46:22+03:00
New Revision: 668b045b8d9ff4ea238dbdc6d07b15beaad8c9f3
URL: https://github.com/llvm/llvm-project/commit/668b045b8d9ff4ea238dbdc6d07b15beaad8c9f3
DIFF: https://github.com/llvm/llvm-project/commit/668b045b8d9ff4ea238dbdc6d07b15beaad8c9f3.diff
LOG: [LSR][NFC] Add test case for pr42770
Added:
llvm/test/Transforms/LoopStrengthReduce/pr42770.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopStrengthReduce/pr42770.ll b/llvm/test/Transforms/LoopStrengthReduce/pr42770.ll
new file mode 100644
index 0000000000000..afe6778f783c4
--- /dev/null
+++ b/llvm/test/Transforms/LoopStrengthReduce/pr42770.ll
@@ -0,0 +1,34 @@
+; Check that it doesn't crash
+; REQUIRES: asserts
+; XFAIL: *
+; RUN: opt < %s -loop-reduce -S
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"
+
+define void @foo() {
+bb:
+ br label %bb4
+
+bb1: ; preds = %bb13
+ %tmp = shl i64 %tmp14, 32
+ %tmp2 = add i64 %tmp, 1
+ %tmp3 = ashr i64 %tmp2, 32
+ ret void
+
+bb4: ; preds = %bb13, %bb
+ %tmp5 = phi i64 [ 2, %bb ], [ %tmp14, %bb13 ]
+ %tmp6 = add i64 %tmp5, 4
+ %tmp7 = trunc i64 %tmp6 to i16
+ %tmp8 = urem i16 %tmp7, 3
+ %tmp9 = mul i16 %tmp8, 2
+ %tmp10 = icmp eq i16 %tmp9, 1
+ br i1 %tmp10, label %bb11, label %bb13
+
+bb11: ; preds = %bb4
+ %tmp12 = udiv i16 1, %tmp7
+ unreachable
+
+bb13: ; preds = %bb4
+ %tmp14 = add nuw nsw i64 %tmp5, 6
+ br i1 undef, label %bb1, label %bb4
+}
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