[PATCH] D108813: [RISCV] Implement CSR mseccfg for spec Smepmp

[QuarticCat via Phabricator via llvm-commits]

QuarticCat added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVSystemOperands.td:254
 
+def : SysReg<"mseccfg", 0x747>;
+let isRV32Only = 1 in
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jrtc27 wrote:
> The definitions here are grouped in the same way that they are in the privileged spec. Is the intent that these CSRs will be part of the same group as the existing PMP registers in the table in the CSR Listings section of the spec (table 2.5 in my build from earlier this year)?
I emailed Nick Kossifidis, here is the response:

> Initialy mseccfg was in the same group with the rest of PMP registers (pmpcfg/pmpaddr) but later on, during review, the address was re-assigned and since it's a single allocation it doesn't belong to any of the groups on that table. I don't know if there is a plan to introduce a new group for small allocations in the future but I can ask if you want.


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  https://reviews.llvm.org/D108813/new/

https://reviews.llvm.org/D108813