[llvm] 5294a0f - [llvm] Fix typos in documentation (NFC)

Kazu Hirata via llvm-commits llvm-commits at lists.llvm.org
Sat Aug 28 06:37:31 PDT 2021 

Author: Kazu Hirata
Date: 2021-08-28T06:37:03-07:00
New Revision: 5294a0f7c3fa1da3f21b787b60dcb28a5912f5c0

URL: https://github.com/llvm/llvm-project/commit/5294a0f7c3fa1da3f21b787b60dcb28a5912f5c0
DIFF: https://github.com/llvm/llvm-project/commit/5294a0f7c3fa1da3f21b787b60dcb28a5912f5c0.diff

LOG: [llvm] Fix typos in documentation (NFC)

Added: 
    

Modified: 
    llvm/docs/AMDGPUUsage.rst
    llvm/docs/CommandGuide/llvm-objdump.rst
    llvm/docs/CommandGuide/llvm-otool.rst
    llvm/docs/GettingStarted.rst
    llvm/docs/GlobalISel/GenericOpcode.rst
    llvm/docs/HowToBuildWindowsItaniumPrograms.rst
    llvm/docs/JITLink.rst
    llvm/docs/LangRef.rst
    llvm/docs/ScudoHardenedAllocator.rst

Removed: 
    


################################################################################
diff  --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index eaf9febf6de63..51c4e9e1bb256 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -1631,7 +1631,7 @@ Loaded Code Object Path Uniform Resource Identifier (URI)
 ---------------------------------------------------------
 
 The AMD GPU code object loader represents the path of the ELF shared object from
-which the code object was loaded as a textual Unifom Resource Identifier (URI).
+which the code object was loaded as a textual Uniform Resource Identifier (URI).
 Note that the code object is the in memory loaded relocated form of the ELF
 shared object.  Multiple code objects may be loaded at 
diff erent memory
 addresses in the same process from the same ELF shared object.

diff  --git a/llvm/docs/CommandGuide/llvm-objdump.rst b/llvm/docs/CommandGuide/llvm-objdump.rst
index 3b79b9c490744..6df8790f5339b 100644
--- a/llvm/docs/CommandGuide/llvm-objdump.rst
+++ b/llvm/docs/CommandGuide/llvm-objdump.rst
@@ -150,7 +150,7 @@ OPTIONS
 
   * ``reg-names-std``: ARM only (default). Print in ARM 's instruction set documentation, with r13/r14/r15 replaced by sp/lr/pc.
   * ``reg-names-raw``: ARM only. Use r followed by the register number.
-  * ``no-aliases``: AArch64 and RISC-V only. Print raw instruction mnemonic instead of pesudo instruction mnemonic.
+  * ``no-aliases``: AArch64 and RISC-V only. Print raw instruction mnemonic instead of pseudo instruction mnemonic.
   * ``numeric``: RISC-V only. Print raw register names instead of ABI mnemonic. (e.g. print x1 instead of ra)
   * ``att``: x86 only (default). Print in the AT&T syntax.
   * ``intel``: x86 only. Print in the intel syntax.

diff  --git a/llvm/docs/CommandGuide/llvm-otool.rst b/llvm/docs/CommandGuide/llvm-otool.rst
index 9284bd946bb99..3f6624e47462a 100644
--- a/llvm/docs/CommandGuide/llvm-otool.rst
+++ b/llvm/docs/CommandGuide/llvm-otool.rst
@@ -69,7 +69,7 @@ OPTIONS
 
 .. option:: -l
 
- Print load commnads.
+ Print load commands.
 
 .. option:: -mcpu=<value>
 

diff  --git a/llvm/docs/GettingStarted.rst b/llvm/docs/GettingStarted.rst
index b776ae742b4e5..724ba1c6b04a8 100644
--- a/llvm/docs/GettingStarted.rst
+++ b/llvm/docs/GettingStarted.rst
@@ -816,7 +816,7 @@ layout:
 
 ``llvm/cmake``
 --------------
-Genereates system build files.
+Generates system build files.
 
 ``llvm/cmake/modules``
   Build configuration for llvm user defined options. Checks compiler version and 

diff  --git a/llvm/docs/GlobalISel/GenericOpcode.rst b/llvm/docs/GlobalISel/GenericOpcode.rst
index 6941aec2290cf..5bfff8f5704ec 100644
--- a/llvm/docs/GlobalISel/GenericOpcode.rst
+++ b/llvm/docs/GlobalISel/GenericOpcode.rst
@@ -292,7 +292,7 @@ These each perform their respective integer arithmetic on a scalar.
 
   %dst:_(s32) = G_ADD %src0:_(s32), %src1:_(s32)
 
-The above exmaple adds %src1 to %src0 and stores the result in %dst.
+The above example adds %src1 to %src0 and stores the result in %dst.
 
 G_SDIVREM, G_UDIVREM
 ^^^^^^^^^^^^^^^^^^^^

diff  --git a/llvm/docs/HowToBuildWindowsItaniumPrograms.rst b/llvm/docs/HowToBuildWindowsItaniumPrograms.rst
index b38c58e6980da..98236410fc5c9 100644
--- a/llvm/docs/HowToBuildWindowsItaniumPrograms.rst
+++ b/llvm/docs/HowToBuildWindowsItaniumPrograms.rst
@@ -97,7 +97,7 @@ Tell the libc++ headers that the Itanium C++ ABI is being used.
 * ``-DCMAKE_C_FLAGS="-lmsvcrt -llegacy_stdio_definitions -D_NO_CRT_STDIO_INLINE"``
 
 Supply CRT definitions including stdio definitions that have been removed from the MS VS CRT.
-We don't want the stdio functions decalred inline as they will casuse multiple defintiion
+We don't want the stdio functions declared inline as they will cause multiple definition
 errors when the same symbols are pulled in from legacy_stdio_definitions.ib.
 
 * ``-DCMAKE_INSTALL_PREFIX=<install path>``

diff  --git a/llvm/docs/JITLink.rst b/llvm/docs/JITLink.rst
index 02bce7053355c..616dcd50fdf3a 100644
--- a/llvm/docs/JITLink.rst
+++ b/llvm/docs/JITLink.rst
@@ -1014,7 +1014,7 @@ with:
 The ``-harness`` option may be of interest to people who want to perform some
 very late testing on build products to verify that compiled code behaves as
 expected. On basic C test cases this is relatively straightforward. Mocks for
-more complicated languages (e.g. C++) are much tricker: Any code involving
+more complicated languages (e.g. C++) are much trickier: Any code involving
 classes tends to have a lot of non-trivial surface area (e.g. vtables) that
 would require great care to mock.
 

diff  --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index ac9ad802e1485..1fe8f9bf7a71d 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -22412,7 +22412,7 @@ Overview:
 """""""""
 
 The purpose of the ``llvm.arithmetic.fence`` intrinsic
-is to prevent the optimizer from performaing fast-math optimizations,
+is to prevent the optimizer from performing fast-math optimizations,
 particularly reassociation,
 between the argument and the expression that contains the argument.
 It can be used to preserve the parentheses in the source language.

diff  --git a/llvm/docs/ScudoHardenedAllocator.rst b/llvm/docs/ScudoHardenedAllocator.rst
index f36308b032eb1..9c1cfa6edcd63 100644
--- a/llvm/docs/ScudoHardenedAllocator.rst
+++ b/llvm/docs/ScudoHardenedAllocator.rst
@@ -45,7 +45,7 @@ The allocator combines several components that serve distinct purposes:
   time options.
 
 - the thread specific data Registry: defines how local caches operate for each
-  thread. There are currently two models implemented: the exlusive model where
+  thread. There are currently two models implemented: the exclusive model where
   each thread holds its own caches (using the ELF TLS); or the shared model
   where threads share a fixed size pool of caches.
 
@@ -262,7 +262,7 @@ The following "mallopt" options are available (options are defined in
 +---------------------------+-------------------------------------------------------+
 | M_DECAY_TIME              | Sets the release interval option to the specified     |
 |                           | value (Android only allows 0 or 1 to respectively set |
-|                           | the interval to the mininum and maximum value as      |
+|                           | the interval to the minimum and maximum value as      |
 |                           | specified at compile time).                           |
 +---------------------------+-------------------------------------------------------+
 | M_PURGE                   | Forces immediate memory reclaiming (value is unused). |

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