[PATCH] D108815: [AMDGPU] Introduce RC flags for vector register classes

Christudasan Devadasan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 27 23:23:44 PDT 2021


cdevadas updated this revision to Diff 369241.
cdevadas edited the summary of this revision.
cdevadas added a comment.

SIRegisterClass interface only for the reg classes that use TSFlags.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108815/new/

https://reviews.llvm.org/D108815

Files:
  llvm/lib/Target/AMDGPU/SIDefines.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.td

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