[llvm] c8c176d - [MipsISelLowering] avoid emitting libcalls to __mulodi4()
Nick Desaulniers via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 27 15:25:07 PDT 2021
Author: Nick Desaulniers
Date: 2021-08-27T15:15:36-07:00
New Revision: c8c176d999d2c2166dee8d67c32b4f8f42b4f1bd
URL: https://github.com/llvm/llvm-project/commit/c8c176d999d2c2166dee8d67c32b4f8f42b4f1bd
DIFF: https://github.com/llvm/llvm-project/commit/c8c176d999d2c2166dee8d67c32b4f8f42b4f1bd.diff
LOG: [MipsISelLowering] avoid emitting libcalls to __mulodi4()
__has_builtin(__builtin_mul_overflow) returns true for 32b MIPS targets,
but Clang is deferring to compiler RT when encountering `long long`
types. This breaks sanitizer builds of the Linux kernel that are using
__builtin_mul_overflow with these types for these targets.
If the semantics of __has_builtin mean "the compiler resolves these,
always" then we shouldn't conditionally emit a libcall.
This will still need to be worked around in the Linux kernel in order to
continue to support malta_defconfig builds of the Linux kernel for this
target with older releases of clang.
Link: https://bugs.llvm.org/show_bug.cgi?id=28629
Link: https://github.com/ClangBuiltLinux/linux/issues/1438
Reviewed By: rengolin
Differential Revision: https://reviews.llvm.org/D108844
Added:
llvm/test/CodeGen/Mips/overflow-intrinsic-optimizations.ll
Modified:
llvm/lib/Target/Mips/MipsISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index 9399c949a3f23..4cf4cb0e88a8b 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -509,6 +509,8 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
setLibcallName(RTLIB::SHL_I128, nullptr);
setLibcallName(RTLIB::SRL_I128, nullptr);
setLibcallName(RTLIB::SRA_I128, nullptr);
+ setLibcallName(RTLIB::MULO_I64, nullptr);
+ setLibcallName(RTLIB::MULO_I128, nullptr);
}
setMinFunctionAlignment(Subtarget.isGP64bit() ? Align(8) : Align(4));
diff --git a/llvm/test/CodeGen/Mips/overflow-intrinsic-optimizations.ll b/llvm/test/CodeGen/Mips/overflow-intrinsic-optimizations.ll
new file mode 100644
index 0000000000000..0bf2f3df58bdd
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/overflow-intrinsic-optimizations.ll
@@ -0,0 +1,19 @@
+; RUN: llc %s -mtriple=mipsel -o - | FileCheck %s
+
+define i1 @no__mulodi4(i32 %a, i64 %b, i32* %c) {
+; CHECK-LABEL: no__mulodi4
+; CHECK-NOT: jal __mulodi4
+entry:
+ %0 = sext i32 %a to i64
+ %1 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %0, i64 %b)
+ %2 = extractvalue { i64, i1 } %1, 1
+ %3 = extractvalue { i64, i1 } %1, 0
+ %4 = trunc i64 %3 to i32
+ %5 = sext i32 %4 to i64
+ %6 = icmp ne i64 %3, %5
+ %7 = or i1 %2, %6
+ store i32 %4, i32* %c, align 4
+ ret i1 %7
+}
+
+declare { i64, i1 } @llvm.smul.with.overflow.i64(i64, i64)
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