[PATCH] D108842: [ARMISelLowering] avoid emitting libcalls to __mulodi4()
Nick Desaulniers via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 27 14:28:11 PDT 2021
nickdesaulniers updated this revision to Diff 369188.
nickdesaulniers edited the summary of this revision.
nickdesaulniers added a comment.
- add MULO_I128 case
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D108842/new/
https://reviews.llvm.org/D108842
Files:
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/ARM/overflow-intrinsic-optimizations.ll
Index: llvm/test/CodeGen/ARM/overflow-intrinsic-optimizations.ll
===================================================================
--- llvm/test/CodeGen/ARM/overflow-intrinsic-optimizations.ll
+++ llvm/test/CodeGen/ARM/overflow-intrinsic-optimizations.ll
@@ -234,6 +234,31 @@
ret i32 %conv
}
+define void @no__mulodi4(i32 %a, i64 %b, i32* %c) {
+; CHECK-LABEL: no__mulodi4
+; CHECK-NOT: bl __mulodi4
+entry:
+ %a.addr = alloca i32, align 4
+ %b.addr = alloca i64, align 8
+ %c.addr = alloca i32*, align 4
+ store i32 %a, i32* %a.addr, align 4
+ store i64 %b, i64* %b.addr, align 8
+ store i32* %c, i32** %c.addr, align 4
+ %0 = load i32, i32* %a.addr, align 4
+ %1 = load i64, i64* %b.addr, align 8
+ %2 = load i32*, i32** %c.addr, align 4
+ %3 = sext i32 %0 to i64
+ %4 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %3, i64 %1)
+ %5 = extractvalue { i64, i1 } %4, 1
+ %6 = extractvalue { i64, i1 } %4, 0
+ %7 = trunc i64 %6 to i32
+ %8 = sext i32 %7 to i64
+ %9 = icmp ne i64 %6, %8
+ %10 = or i1 %5, %9
+ store i32 %7, i32* %2, align 4
+ ret void
+}
+
declare void @llvm.trap() #2
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) #1
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #1
@@ -241,3 +266,4 @@
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #1
declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) #1
declare { i32, i1 } @llvm.umul.with.overflow.i32(i32, i32) #1
+declare { i64, i1 } @llvm.smul.with.overflow.i64(i64, i64)
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -545,6 +545,8 @@
setLibcallName(RTLIB::SRL_I128, nullptr);
setLibcallName(RTLIB::SRA_I128, nullptr);
setLibcallName(RTLIB::MUL_I128, nullptr);
+ setLibcallName(RTLIB::MULO_I64, nullptr);
+ setLibcallName(RTLIB::MULO_I128, nullptr);
// RTLIB
if (Subtarget->isAAPCS_ABI() &&
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D108842.369188.patch
Type: text/x-patch
Size: 2010 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210827/25631c8f/attachment.bin>
More information about the llvm-commits
mailing list