[llvm] dbf0d81 - [RISCV] Use ~0ULL instead of ~0U when checking for invalid ErrorInfo.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2021-08-27T12:30:33-07:00
New Revision: dbf0d8118ccbfd09def0974bf671c39e94d0be93

URL: https://github.com/llvm/llvm-project/commit/dbf0d8118ccbfd09def0974bf671c39e94d0be93
DIFF: https://github.com/llvm/llvm-project/commit/dbf0d8118ccbfd09def0974bf671c39e94d0be93.diff

LOG: [RISCV] Use ~0ULL instead of ~0U when checking for invalid ErrorInfo.

ErrorInfo is a uint64_t and is initialized to all 1s.

Not sure how to test this. Noticed while working on .insn support.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index b2683d575e14d..c3ccec10d804b 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -1002,7 +1002,7 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
   }
   case Match_InvalidOperand: {
     SMLoc ErrorLoc = IDLoc;
-    if (ErrorInfo != ~0U) {
+    if (ErrorInfo != ~0ULL) {
       if (ErrorInfo >= Operands.size())
         return Error(ErrorLoc, "too few operands for instruction");
 
@@ -1019,7 +1019,7 @@ bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
   // corresponding operand is missing.
   if (Result > FIRST_TARGET_MATCH_RESULT_TY) {
     SMLoc ErrorLoc = IDLoc;
-    if (ErrorInfo != ~0U && ErrorInfo >= Operands.size())
+    if (ErrorInfo != ~0ULL && ErrorInfo >= Operands.size())
       return Error(ErrorLoc, "too few operands for instruction");
   }