[PATCH] D108830: [AMDGPU] Propagate defining src reg for AGPR to AGPR Copys

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp:160
   }
 
+  for (MachineFunction::iterator BI = MF.begin(), BE = MF.end(); BI != BE;
----------------
Can skip this whole pass if this isn't gfx908


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Comment at: llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp:161-162
 
+  for (MachineFunction::iterator BI = MF.begin(), BE = MF.end(); BI != BE;
+       ++BI) {
+    MachineBasicBlock *MBB = &*BI;
----------------
Since you're visiting all the defs anyway, could you unify this with the previous loop when an agpr register is found?


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Comment at: llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp:201
+          if (Def.getOpcode() == AMDGPU::V_ACCVGPR_WRITE_B32_e64) {
+            MachineOperand DefSrcMO = Def.getOperand(1);
+
----------------
I'm worried this might not work correctly with overlapping subregisters


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Comment at: llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp:211-214
+              LIS->removeInterval(DefSrcMO.getReg());
+              LIS->removeInterval(SrcReg);
+              LIS->createAndComputeVirtRegInterval(DefSrcMO.getReg());
+              LIS->createAndComputeVirtRegInterval(SrcReg);
----------------
Should not need to totally trash the liveness and start over


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108830/new/

https://reviews.llvm.org/D108830