[PATCH] D108815: [AMDGPU] Introduce RC flags for vector register classes

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas created this revision.
cdevadas added reviewers: arsenm, rampitec.
Herald added subscribers: foad, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
cdevadas requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
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Configure and use the TSFlags in TargetRegisterClass to
have unique flags for VGPR and AGPR register classes. The
vector register class queries like `hasVGPR` will be more
efficient with just a bitwise operation.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108815

Files:
  llvm/lib/Target/AMDGPU/SIDefines.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.td

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