[llvm] ca4be0f - AMDGPU: Fix hardcoded registers in test

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2021-08-26T22:09:31-04:00
New Revision: ca4be0f9a1f7730e1db9cf39c2ed038cc4f0dcbc

URL: https://github.com/llvm/llvm-project/commit/ca4be0f9a1f7730e1db9cf39c2ed038cc4f0dcbc
DIFF: https://github.com/llvm/llvm-project/commit/ca4be0f9a1f7730e1db9cf39c2ed038cc4f0dcbc.diff

LOG: AMDGPU: Fix hardcoded registers in test

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/call-argument-types.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
index 704f76d9c467..1f3847a3daca 100644
--- a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
@@ -87,7 +87,7 @@ define amdgpu_kernel void @test_call_external_void_func_i1_imm() #0 {
 ; GCN: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
 ; GCN-NEXT: s_add_u32 s[[PC_LO]], s[[PC_LO]], external_void_func_i1_signext at rel32@lo+4
 ; GCN-NEXT: s_addc_u32 s[[PC_HI]], s[[PC_HI]], external_void_func_i1_signext at rel32@hi+12
-; GCN-NEXT: v_bfe_i32 v0, v0, 0, 1
+; GCN-NEXT: v_bfe_i32 v0, [[VAR]], 0, 1
 ; GCN-NEXT: s_swappc_b64 s[30:31], s{{\[}}[[PC_LO]]:[[PC_HI]]{{\]}}
 ; GCN-NEXT: s_endpgm
 define amdgpu_kernel void @test_call_external_void_func_i1_signext(i32) #0 {
@@ -99,16 +99,16 @@ define amdgpu_kernel void @test_call_external_void_func_i1_signext(i32) #0 {
 ; FIXME: load should be scheduled before getpc
 ; GCN-LABEL: {{^}}test_call_external_void_func_i1_zeroext:
 
-; HSA: buffer_load_ubyte v0
+; HSA: buffer_load_ubyte [[VAL:v[0-9]+]]
 ; HSA-DAG: s_mov_b32 s32, 0{{$}}
 
-; MESA: buffer_load_ubyte v0
+; MESA: buffer_load_ubyte [[VAL:v[0-9]+]]
 ; MESA-DAG: s_mov_b32 s32, 0{{$}}
 
 ; GCN: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
 ; GCN-NEXT: s_add_u32 s[[PC_LO]], s[[PC_LO]], external_void_func_i1_zeroext at rel32@lo+4
 ; GCN-NEXT: s_addc_u32 s[[PC_HI]], s[[PC_HI]], external_void_func_i1_zeroext at rel32@hi+12
-; GCN-NEXT: v_and_b32_e32 v0, 1, v0
+; GCN-NEXT: v_and_b32_e32 v0, 1, [[VAL]]
 ; GCN-NEXT: s_swappc_b64 s[30:31], s{{\[}}[[PC_LO]]:[[PC_HI]]{{\]}}
 ; GCN-NEXT: s_endpgm
 define amdgpu_kernel void @test_call_external_void_func_i1_zeroext(i32) #0 {
@@ -136,7 +136,7 @@ define amdgpu_kernel void @test_call_external_void_func_i8_imm(i32) #0 {
 ; FIXME: don't wait before call
 ; GCN-LABEL: {{^}}test_call_external_void_func_i8_signext:
 
-; GCN-DAG: buffer_load_sbyte v0
+; GCN-DAG: buffer_load_sbyte [[VAL:v[0-9]+]]
 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
 ; GCN-DAG: s_add_u32 s[[PC_LO]], s[[PC_LO]], external_void_func_i8_signext at rel32@lo+4
 ; GCN-DAG: s_addc_u32 s[[PC_HI]], s[[PC_HI]], external_void_func_i8_signext at rel32@hi+12
@@ -154,7 +154,7 @@ define amdgpu_kernel void @test_call_external_void_func_i8_signext(i32) #0 {
 
 ; GCN-LABEL: {{^}}test_call_external_void_func_i8_zeroext:
 
-; GCN-DAG: buffer_load_ubyte v0
+; GCN-DAG: buffer_load_ubyte [[VAL:v[0-9]+]]
 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
 ; GCN-DAG: s_add_u32 s[[PC_LO]], s[[PC_LO]], external_void_func_i8_zeroext at rel32@lo+4
 ; GCN-DAG: s_addc_u32 s[[PC_HI]], s[[PC_HI]], external_void_func_i8_zeroext at rel32@hi+12
@@ -183,7 +183,7 @@ define amdgpu_kernel void @test_call_external_void_func_i16_imm() #0 {
 
 ; GCN-LABEL: {{^}}test_call_external_void_func_i16_signext:
 
-; GCN-DAG: buffer_load_sshort v0
+; GCN-DAG: buffer_load_sshort [[VAL:v[0-9]+]]
 ; GCN-DAG: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
 ; GCN-DAG: s_add_u32 s[[PC_LO]], s[[PC_LO]], external_void_func_i16_signext at rel32@lo+4
 ; GCN-DAG: s_addc_u32 s[[PC_HI]], s[[PC_HI]], external_void_func_i16_signext at rel32@hi+12