[PATCH] D105269: [X86] AVX512FP16 instructions enabling 6/6
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 26 16:47:01 PDT 2021
LuoYuanke added inline comments.
================
Comment at: llvm/lib/Target/X86/X86InstrFoldTables.cpp:1852
+ { X86::VFCMULCPHZrr, X86::VFCMULCPHZrm, 0 },
+ { X86::VFCMULCSHZrr, X86::VFCMULCSHZrm, TB_NO_REVERSE },
{ X86::VFMADDPD4Yrr, X86::VFMADDPD4Ymr, 0 },
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pengfei wrote:
> LuoYuanke wrote:
> > Why FR32X version is not needed for complex scalar instructions?
> Do you mean complex ss/sd? We don't have these instructions.
No, I mean we have both X86::XXX and X86::XXX_Int for other instructions. One is FR16X which can be unfolded, one is VR128X which can't. For example, VFNMADD213SHZm and VFNMADD213SHZm_Int.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105269/new/
https://reviews.llvm.org/D105269
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