[llvm] 9cc0023 - [MCA][NFC] Remove redundant calls to std::move.
Andrea Di Biagio via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 26 11:48:42 PDT 2021
Author: Andrea Di Biagio
Date: 2021-08-26T19:47:59+01:00
New Revision: 9cc0023fb863194be526f0bf19bd21e36236c5f6
URL: https://github.com/llvm/llvm-project/commit/9cc0023fb863194be526f0bf19bd21e36236c5f6
DIFF: https://github.com/llvm/llvm-project/commit/9cc0023fb863194be526f0bf19bd21e36236c5f6.diff
LOG: [MCA][NFC] Remove redundant calls to std::move.
This fixes some redundant move in return statement [-Wredundant-move] gcc 9.3.0
warnings.
This also fixes a minor coverity issue reported agaist class MCAOperand about
the lack of proper initialization for field Index.
No functional change intended.
Added:
Modified:
llvm/include/llvm/MCA/Instruction.h
llvm/lib/MCA/InstrBuilder.cpp
llvm/lib/MCA/Pipeline.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MCA/Instruction.h b/llvm/include/llvm/MCA/Instruction.h
index 988cddcbe013e..326b933cf4aa4 100644
--- a/llvm/include/llvm/MCA/Instruction.h
+++ b/llvm/include/llvm/MCA/Instruction.h
@@ -46,7 +46,7 @@ class MCAOperand {
kSFPImmediate, ///< Single-floating-point immediate operand.
kDFPImmediate, ///< Double-Floating-point immediate operand.
};
- MCAOperandType Kind = kInvalid;
+ MCAOperandType Kind;
union {
unsigned RegVal;
@@ -62,7 +62,8 @@ class MCAOperand {
unsigned Index;
public:
- MCAOperand() : FPImmVal(0) {}
+
+ MCAOperand() : Kind(kInvalid), FPImmVal(), Index() {}
bool isValid() const { return Kind != kInvalid; }
bool isReg() const { return Kind == kRegister; }
diff --git a/llvm/lib/MCA/InstrBuilder.cpp b/llvm/lib/MCA/InstrBuilder.cpp
index 4067d86930d1c..633df8a49f530 100644
--- a/llvm/lib/MCA/InstrBuilder.cpp
+++ b/llvm/lib/MCA/InstrBuilder.cpp
@@ -604,7 +604,7 @@ InstrBuilder::createInstrDescImpl(const MCInst &MCI) {
computeMaxLatency(*ID, MCDesc, SCDesc, STI);
if (Error Err = verifyOperands(MCDesc, MCI))
- return std::move(Err);
+ return Err;
populateWrites(*ID, MCI, SchedClassID);
populateReads(*ID, MCI, SchedClassID);
@@ -614,7 +614,7 @@ InstrBuilder::createInstrDescImpl(const MCInst &MCI) {
// Sanity check on the instruction descriptor.
if (Error Err = verifyInstrDesc(*ID, MCI))
- return std::move(Err);
+ return Err;
// Now add the new descriptor.
bool IsVariadic = MCDesc.isVariadic();
@@ -707,7 +707,7 @@ InstrBuilder::createInstruction(const MCInst &MCI) {
// Early exit if there are no writes.
if (D.Writes.empty())
- return std::move(NewIS);
+ return NewIS;
// Track register writes that implicitly clear the upper portion of the
// underlying super-registers using an APInt.
@@ -736,7 +736,7 @@ InstrBuilder::createInstruction(const MCInst &MCI) {
++WriteIndex;
}
- return std::move(NewIS);
+ return NewIS;
}
} // namespace mca
} // namespace llvm
diff --git a/llvm/lib/MCA/Pipeline.cpp b/llvm/lib/MCA/Pipeline.cpp
index 22b9d0799f77d..eb651c3480cea 100644
--- a/llvm/lib/MCA/Pipeline.cpp
+++ b/llvm/lib/MCA/Pipeline.cpp
@@ -40,7 +40,8 @@ Expected<unsigned> Pipeline::run() {
do {
notifyCycleBegin();
if (Error Err = runCycle())
- return std::move(Err);
+ return Err;
+
notifyCycleEnd();
++Cycles;
} while (hasWorkToProcess());
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