[llvm] 1eb7536 - [MCA][RegisterFile] Consistently update the PRF in the presence of multiple writes to the same register.
Andrea Di Biagio via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 26 11:16:41 PDT 2021
Author: Andrea Di Biagio
Date: 2021-08-26T19:16:20+01:00
New Revision: 1eb75362c9903fcaa8b5ceb28ab36234ddda0cca
URL: https://github.com/llvm/llvm-project/commit/1eb75362c9903fcaa8b5ceb28ab36234ddda0cca
DIFF: https://github.com/llvm/llvm-project/commit/1eb75362c9903fcaa8b5ceb28ab36234ddda0cca.diff
LOG: [MCA][RegisterFile] Consistently update the PRF in the presence of multiple writes to the same register.
My last change to the RegisterFile (PR51495) has introduced a bug in the logic
that allocates physical registers in the PRF.
In some cases, this bug could have triggered a nasty unsigned wrap in the number
of allocated registers, thus resulting in mca being stuck forever in a loop of
PRF availability checks.
Added:
Modified:
llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
Removed:
################################################################################
diff --git a/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp b/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
index 1c0f40dd73082..474bf84cf8913 100644
--- a/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
+++ b/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
@@ -294,7 +294,9 @@ void RegisterFile::addRegisterWrite(WriteRef Write,
const WriteState *OtherWS = OtherWrite.getWriteState();
if (OtherWS && OtherWrite.getSourceIndex() == Write.getSourceIndex()) {
if (OtherWS->getLatency() > WS.getLatency()) {
- // Conservatively keep the slowest write to RegID.
+ // Conservatively keep the slowest write on RegID.
+ if (ShouldAllocatePhysRegs)
+ allocatePhysRegs(RegisterMappings[RegID].second, UsedPhysRegs);
return;
}
}
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