[PATCH] D108773: [AArch64][GlobalISel] Optimize G_BUILD_VECTOR of undef + 1 elt -> SUBREG_TO_REG

[Jessica Paquette via Phabricator via llvm-commits]

paquette created this revision.
paquette added reviewers: aemerson, jroelofs.
Herald added subscribers: hiraditya, kristof.beyls, rovka.
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This pattern

  %elt = ... something ...
  %undef = G_IMPLICIT_DEF
  %vec = G_BUILD_VECTOR %elt, %undef, %undef, ... %undef

Can be selected to a SUBREG_TO_REG, assuming `%elt` and `%vec` have the same register bank. We don't care about any of the bits in `%vec` aside from those in `%elt`, which just happens to be the 0th element.

This is preferable to emitting `mov` instructions for every index.

This gives minor code size improvements on the test suite at -Os.


https://reviews.llvm.org/D108773

Files:
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/select-build-vector.mir
  llvm/test/CodeGen/AArch64/arm64-rev.ll

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