[PATCH] D108767: [TableGen] Allow target specific flags for RegisterClass

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas created this revision.
cdevadas added reviewers: qcolombet, MatzeB, arsenm, rampitec.
cdevadas requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

Analogous to the TSFlags for machine instructions, this
patch introduces a variable for target specific flags in
TargetRegisterClass that acts as configurable bitfields
for register classes.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108767

Files:
  llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/include/llvm/Target/Target.td
  llvm/test/TableGen/RegisterInfoEmitter-tsflags.td
  llvm/utils/TableGen/CodeGenRegisters.cpp
  llvm/utils/TableGen/CodeGenRegisters.h
  llvm/utils/TableGen/RegisterInfoEmitter.cpp

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