[llvm] 47f2aff - Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 26 07:08:29 PDT 2021
Author: Simon Pilgrim
Date: 2021-08-26T15:08:12+01:00
New Revision: 47f2affa08c2decde4b9ad548fc01378909e1509
URL: https://github.com/llvm/llvm-project/commit/47f2affa08c2decde4b9ad548fc01378909e1509
DIFF: https://github.com/llvm/llvm-project/commit/47f2affa08c2decde4b9ad548fc01378909e1509.diff
LOG: Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI.
Added:
Modified:
llvm/lib/Target/X86/X86MCInstLower.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index cb3ba4ec7f358..c7740113f89e2 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -1341,7 +1341,7 @@ void X86AsmPrinter::LowerASAN_CHECK_MEMACCESS(const MachineInstr &MI) {
if (!Sym) {
std::string Name = AccessInfo.IsWrite ? "store" : "load";
std::string SymName = "__asan_check_" + Name +
- utostr(1 << AccessInfo.AccessSizeIndex) + "_rn" +
+ utostr(1ULL << AccessInfo.AccessSizeIndex) + "_rn" +
utostr(Reg);
Sym = OutContext.getOrCreateSymbol(SymName);
}
@@ -1519,7 +1519,7 @@ void X86AsmPrinter::emitAsanReportError(Module &M, unsigned Reg,
MCSubtargetInfo &STI) {
std::string Name = AccessInfo.IsWrite ? "store" : "load";
MCSymbol *ReportError = OutContext.getOrCreateSymbol(
- "__asan_report_" + Name + utostr(1 << AccessInfo.AccessSizeIndex));
+ "__asan_report_" + Name + utostr(1ULL << AccessInfo.AccessSizeIndex));
OutStreamer->emitInstruction(MCInstBuilder(X86::MOV64rr)
.addReg(X86::RDI)
.addReg(X86::NoRegister + Reg),
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