[PATCH] D108725: [AArch64][GlobalISel] Implement custom legalization for s32/s64 G_FCOPYSIGN
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 25 17:15:38 PDT 2021
paquette added a comment.
Not quite.
We get the following for s32 with G_MERGE_VALUES:
legalize_s32:
adrp x8, .LCPI0_0
mov v0.s[1], v0.s[0]
mov v1.s[1], v0.s[0]
ldr q2, [x8, :lo12:.LCPI0_0]
mov v0.s[2], v0.s[0]
mov v0.s[3], v0.s[0]
mov v1.s[2], v0.s[0]
mov v1.s[3], v0.s[0]
bit v0.16b, v1.16b, v2.16b
ret
Meanwhile, with SDAG we get
movi v2.4s, #128, lsl #24 ; We should emit the constant like this, but we don't have that optimization
bit v0.16b, v1.16b, v2.16b
ret
We can probably change the selector code to recognize the pattern though. Using G_INSERT_VECTOR_ELT is only slightly better.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D108725/new/
https://reviews.llvm.org/D108725
More information about the llvm-commits
mailing list