[PATCH] D108672: [ARC] Add ADC (addition with carry) and SBC (subtraction with carry) instructions
Thomas Johnson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 24 16:12:57 PDT 2021
thomasjohns created this revision.
thomasjohns added a reviewer: marksl.
Herald added a subscriber: hiraditya.
thomasjohns requested review of this revision.
Herald added a project: LLVM.
Add the definitions for these instructions to tablegen in `ARCInstrInfo.td` along with disassembly test cases. The test cases follow the same R-R-R, R-R-Imm, f-flag, and condition code variations as the tests for the `add` instruction.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D108672
Files:
llvm/lib/Target/ARC/ARCInstrInfo.td
llvm/test/MC/Disassembler/ARC/alu.txt
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D108672.368491.patch
Type: text/x-patch
Size: 3495 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210824/66a580af/attachment.bin>
More information about the llvm-commits
mailing list