[PATCH] D108607: [RISCV] Optimize (add (mul x, c0), c1)

Ben Shi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 23 22:12:39 PDT 2021


benshi001 added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:5864
+  int64_t C1 = NC1->getSExtValue();
+  if (APInt(64, C1).isSignedIntN(12) || !APInt(64, C1 % C0).isSignedIntN(12) ||
+      !APInt(64, C1 / C0).isSignedIntN(12))
----------------
craig.topper wrote:
> craig.topper wrote:
> > You just use isInt<12> from MathUtils.h and not use APInt.
> You need to guard against C0 being 0.
> 
> I'm also concerned about the possibility of signed overflow if C1=INT_MIN C0 = -1.
I think we can skip if C1 is -1/0/+1, then all corner cases are excluded.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108607/new/

https://reviews.llvm.org/D108607



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