[llvm] fe51f90 - [AArch64][GlobalISel] Legalize G_LLROUND for s64 + s32

Jessica Paquette via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 23 09:45:59 PDT 2021


Author: Jessica Paquette
Date: 2021-08-23T09:45:23-07:00
New Revision: fe51f9098b41047a4db234801473956fbdc4b53b

URL: https://github.com/llvm/llvm-project/commit/fe51f9098b41047a4db234801473956fbdc4b53b
DIFF: https://github.com/llvm/llvm-project/commit/fe51f9098b41047a4db234801473956fbdc4b53b.diff

LOG: [AArch64][GlobalISel] Legalize G_LLROUND for s64 + s32

Same as G_LROUND.

Also add a TODO for full fp16 legalization.

Differential Revision: https://reviews.llvm.org/D108564

Added: 
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 9a27a19d65d8f..4f84f3999cd72 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -767,7 +767,9 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
       .minScalar(0, MinFPScalar);
 
   // TODO: Libcall support for s128.
-  getActionDefinitionsBuilder(G_LROUND).legalFor({{s64, s32}, {s64, s64}});
+  // TODO: s16 should be legal with full FP16 support.
+  getActionDefinitionsBuilder({G_LROUND, G_LLROUND})
+      .legalFor({{s64, s32}, {s64, s64}});
 
   getLegacyLegalizerInfo().computeTables();
   verify(*ST.getInstrInfo());

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir
new file mode 100644
index 0000000000000..1b0b0e742e972
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir
@@ -0,0 +1,39 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
+
+...
+---
+name:            s64_s32_legal
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $s0
+    ; CHECK-LABEL: name: s64_s32_legal
+    ; CHECK: liveins: $s0
+    ; CHECK: %copy:_(s32) = COPY $s0
+    ; CHECK: %llround:_(s64) = G_LLROUND %copy(s32)
+    ; CHECK: %trunc:_(s32) = G_TRUNC %llround(s64)
+    ; CHECK: $w0 = COPY %trunc(s32)
+    ; CHECK: RET_ReallyLR implicit $w0
+    %copy:_(s32) = COPY $s0
+    %llround:_(s64) = G_LLROUND %copy(s32)
+    %trunc:_(s32) = G_TRUNC %llround
+    $w0 = COPY %trunc(s32)
+    RET_ReallyLR implicit $w0
+...
+---
+name:            s64_s64_legal
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $d0
+    ; CHECK-LABEL: name: s64_s64_legal
+    ; CHECK: liveins: $d0
+    ; CHECK: %copy:_(s64) = COPY $d0
+    ; CHECK: %llround:_(s64) = G_LLROUND %copy(s64)
+    ; CHECK: $x0 = COPY %llround(s64)
+    ; CHECK: RET_ReallyLR implicit $x0
+    %copy:_(s64) = COPY $d0
+    %llround:_(s64) = G_LLROUND %copy(s64)
+    $x0 = COPY %llround
+    RET_ReallyLR implicit $x0

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
index 3cd0e7add9db8..4b2629b78099b 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -530,8 +530,9 @@
 # DEBUG-NEXT: .. the first uncovered type index: 2, OK
 # DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_LLROUND (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
+# DEBUG-NEXT: .. the first uncovered type index: 2, OK
+# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_BR (opcode {{[0-9]+}}): 0 type indices, 0 imm indices
 # DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
 # DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined


        


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