[PATCH] D108557: [docs, AMDGPU] Fix typo in dwarf register number mapping

[Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits]

RamNalamothu created this revision.
RamNalamothu added reviewers: scott.linder, t-tye.
Herald added subscribers: kerbowa, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
RamNalamothu requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108557

Files:
  llvm/docs/AMDGPUUsage.rst


Index: llvm/docs/AMDGPUUsage.rst
===================================================================
--- llvm/docs/AMDGPUUsage.rst
+++ llvm/docs/AMDGPUUsage.rst
@@ -1719,7 +1719,7 @@
    512            VCC_32            32       Vector Condition Code Register
                                              when executing in wavefront 32
                                              mode.
-   513-1023       *Reserved*                 *Reserved for future Vector
+   513-767        *Reserved*                 *Reserved for future Vector
                                              Architectural Registers when
                                              executing in wavefront 32 mode.*
    768            VCC_64            64       Vector Condition Code Register


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