[PATCH] D107795: [AArch64][DAGCombine] Check the legality of the index of EXTRACT_SUBVECTOR

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Do all the checks pass with this? The precommit checks suggest that an AMD test is failing.



================
Comment at: llvm/test/CodeGen/AArch64/aarch64-avoid-illegal-extract-subvector.ll:8
+
+define dso_local void @h() local_unnamed_addr {
+; CHECK-LABEL: h:
----------------
RKSimon wrote:
> RKSimon wrote:
> > david-arm wrote:
> > > Would it be possible to reduce this test a lot further? It looks like it shouldn't be too difficult to hand-write a new test that does something like:
> > > 
> > >   %i1 = extractelement <4 x i32> %x, i32 1
> > >   %zi1 = zext i32 %i1 to i64
> > >   %i2 = extractelement <4 x i32> %x, i32 2
> > >   %zi2 = zext i32 %i2 to i64
> > >   %v1 = insertelement <2 x i64> undef, %zi1, i32 0
> > >   %v2 = insertelement <2 x i64> %v1, %zi2, i32 1
> > > 
> > > That looks like what the DAG combine is testing for and since the first extract is at index 1 it is not a multiple of the number of elements in the final build vector (<2 x i64>)
> > @guopeilin Any luck with simplifying this test?
> Can this be cleaned up anymore - the dso_local / local_unnamed_addr attributes seem superfluous for instance.
Can you also generate the checks with the script. The file says it's generated with update_llc_test_checks, but these checks look sparse. Can you also add the testcase David talked about:
```
define <2 x i64> @test(<4 x i32> %x) #0 {
  %i1 = extractelement <4 x i32> %x, i32 1
  %zi1 = zext i32 %i1 to i64
  %i2 = extractelement <4 x i32> %x, i32 2
  %zi2 = zext i32 %i2 to i64
  %v1 = insertelement <2 x i64> undef, i64 %zi1, i32 0
  %v2 = insertelement <2 x i64> %v1, i64 %zi2, i32 1
  ret <2 x i64> %v2
}
```

It won't fail, but does show the same unaligned EXTRACT_SUBVECTOR. I guess that at some point worked for unaligned extract offsets.


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