[PATCH] D45962: [MC] Use local MCSubtargetInfo in writeNops

Peter Smith via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 20 09:43:23 PDT 2021


peter.smith updated this revision to Diff 367816.
peter.smith edited the summary of this revision.
peter.smith added a comment.
Herald added subscribers: foad, hiraditya, dylanmckay.
Herald added a project: LLVM.

Rebased (quite a lot) to account for a couple of years of changes.

I've included the changes to the two new x86 specific MCFragments MCNopsFragment and MCBoundaryAlignFragment that also call emitNops. I can split these changes out if needed but I thought it better to show the magnitude of the change in one go.

As mentioned in D45961 <https://reviews.llvm.org/D45961> an alternative, less disruptive implementation (the Arm backend does not use MCNopsFragment or MCBoundaryAlignFragment) is to permit the MCSubtargetInfo to be nullptr which would mean retaining the STI in the Arm MCAsmBackend and a test in emitNops() to see if the STI passed in where nullptr.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D45962/new/

https://reviews.llvm.org/D45962

Files:
  llvm/include/llvm/MC/MCAsmBackend.h
  llvm/include/llvm/MC/MCFragment.h
  llvm/include/llvm/MC/MCObjectStreamer.h
  llvm/include/llvm/MC/MCStreamer.h
  llvm/lib/MC/MCAssembler.cpp
  llvm/lib/MC/MCObjectStreamer.cpp
  llvm/lib/MC/MCStreamer.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendELF.h
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendWinCOFF.h
  llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
  llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
  llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
  llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
  llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
  llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
  llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
  llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
  llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
  llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
  llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
  llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
  llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
  llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
  llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
  llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
  llvm/test/CodeGen/ARM/subtarget-align.ll
  llvm/test/MC/ARM/subtarget-nop.s

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