[llvm] da253d5 - [M68k][test] Migrate some MOVE instruction MC tests
Min-Yih Hsu via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 22 22:39:26 PDT 2021
Author: Min-Yih Hsu
Date: 2021-08-22T22:28:40-07:00
New Revision: da253d569054a3b304dd78963a8fc919d361098c
URL: https://github.com/llvm/llvm-project/commit/da253d569054a3b304dd78963a8fc919d361098c
DIFF: https://github.com/llvm/llvm-project/commit/da253d569054a3b304dd78963a8fc919d361098c.diff
LOG: [M68k][test] Migrate some MOVE instruction MC tests
Migrate some MOVE instruction MC tests from test/CodeGen/M68k.
Unfortunately the tests touched in this commit were failed due to
lacking of the `abs.W` operand, which forces any memory address parsed
from assembly being represented in 32-bits.
We're temporarily allowing these unwanted widening in the tests until
the support for `abs.W` is there.
Added:
llvm/test/MC/M68k/Data/Classes/MxMove_MM.s
llvm/test/MC/M68k/Data/Classes/MxMove_MR.s
llvm/test/MC/M68k/Data/Classes/MxMove_RM.s
llvm/test/MC/M68k/Data/Classes/MxMove_RR.s
Modified:
Removed:
llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MM.mir
llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MR.mir
llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RM.mir
llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RR.mir
################################################################################
diff --git a/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MM.mir b/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MM.mir
deleted file mode 100644
index 60e01f1ad5e6d..0000000000000
--- a/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MM.mir
+++ /dev/null
@@ -1,217 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN: | extract-section .text \
-# RUN: | FileCheck %s -check-prefixes=MOV8JK,MOV32JK,MOV8JQ,MOV32JQ,MOV8FF,MOV32FF
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN: | extract-section .text \
-# RUN: | FileCheck %s -check-prefixes=MOV8PP,MOV32PP,MOV8JJ,MOV32JJ,MOV8OO,MOV32OO
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN: | extract-section .text \
-# RUN: | FileCheck %s -check-prefixes=MOV8EE,MOV32EE,MOV8BB,MOV32BB
-
-#------------------------------------------------------------------------------
-# MxMove_MM is used for moving data from memory to memory
-#------------------------------------------------------------------------------
-
---- # ARI <- PCI
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8JK: 0 0 0 1 0 0 0 0 . 1 0 1 1 1 0 1 1
-# MOV8JK-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV8JK-SAME: 0 0 0 1 0 0 0 0 . 1 0 1 1 1 0 1 1
-# MOV8JK-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32JK-SAME: 0 0 1 0 0 0 0 0 . 1 0 1 1 1 0 1 1
-# MOV32JK-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32JK-SAME: 0 0 1 0 0 0 1 0 . 1 0 1 1 1 0 1 1
-# MOV32JK-SAME: 1 0 1 0 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---+-----------+---+-------+---+-------------------------------
-# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
-# ---+-----------+---+-------+---+-------------------------------
-name: MxMove_RM_ARI_PCI
-body: |
- bb.0:
- MOV8jk $a0, 0, $d1, implicit-def $ccr
- MOV8jk $a0, -1, $d1, implicit-def $ccr
- MOV32jk $a0, 0, $d1, implicit-def $ccr
- MOV32jk $a1, 0, $a2, implicit-def $ccr
-
-...
---- # ARI <- PCD
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8JQ-SAME: 0 0 0 1 0 0 0 0 . 1 0 1 1 1 0 1 0
-# MOV8JQ-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32JQ-SAME: 0 0 1 0 0 0 0 0 . 1 0 1 1 1 0 1 0
-# MOV32JQ-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32JQ-SAME: 0 0 1 0 0 0 0 0 . 1 0 1 1 1 0 1 0
-# MOV32JQ-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-name: MxMove_RM_PCD
-body: |
- bb.0:
- MOV8jq $a0, 0, implicit-def $ccr
- MOV32jq $a0, -1, implicit-def $ccr
- MOV32jq $a0, -1, implicit-def $ccr
-
-...
---- # ARII <- ARII
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8FF: 0 0 0 1 0 0 0 1 . 1 0 1 1 0 0 0 0
-# MOV8FF-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# MOV8FF-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV8FF-SAME: 0 0 0 1 0 0 0 1 . 1 0 1 1 0 0 0 0
-# MOV8FF-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
-# MOV8FF-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32FF-SAME: 0 0 1 0 0 0 1 1 . 1 0 1 1 0 0 0 1
-# MOV32FF-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# MOV32FF-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32FF-SAME: 0 0 1 0 0 1 0 1 . 1 0 1 1 0 0 1 0
-# MOV32FF-SAME: 1 0 1 0 1 0 0 0 . 0 0 1 0 1 0 1 0
-# MOV32FF-SAME: 1 0 1 0 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---+-----------+---+-------+---+-------------------------------
-# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
-# ---+-----------+---+-------+---+-------------------------------
-name: MxMove_RM_ARII_ARII
-body: |
- bb.0:
- MOV8ff -1, $a0, $d1, 0, $a0, $d1, implicit-def $ccr
- MOV8ff -1, $a0, $d1, -1, $a0, $d1, implicit-def $ccr
- MOV32ff 0, $a1, $d1, 0, $a1, $d1, implicit-def $ccr
- MOV32ff 0, $a2, $a2, 42, $a2, $a2, implicit-def $ccr
-
-...
---- # ARID <- ARID
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8PP: 0 0 0 1 0 0 0 1 . 0 1 1 0 1 0 0 0
-# MOV8PP-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# MOV8PP-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32PP-SAME: 0 0 1 0 0 0 1 1 . 0 1 1 0 1 0 0 1
-# MOV32PP-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# MOV32PP-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32PP-SAME: 0 0 1 0 0 0 1 1 . 0 1 1 0 1 0 0 1
-# MOV32PP-SAME: 0 0 0 0 0 0 0 0 . 0 0 1 0 1 0 1 0
-# MOV32PP-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-name: MxMove_RM_ARID
-body: |
- bb.0:
- MOV8pp 0, $a0, 0, $a0, implicit-def $ccr
- MOV32pp 0, $a1, -1, $a1, implicit-def $ccr
- MOV32pp -1, $a1, 42, $a1, implicit-def $ccr
-
-...
---- # ARIPD <- ARIPD
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8EE: 0 0 0 1 0 0 0 1 . 0 0 1 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32EE-SAME: 0 0 1 0 0 0 1 1 . 0 0 1 0 0 0 0 1
-# ---------------------------------------------------------------
-# MOV32EE-SAME: 0 0 1 0 0 0 1 1 . 0 0 1 0 0 0 0 1
-name: MxMove_RM_ARIPD
-body: |
- bb.0:
- MOV8ee $a0, $a0, implicit-def $ccr
- MOV32ee $a1, $a1, implicit-def $ccr
- MOV32ee $a1, $a1, implicit-def $ccr
-
-...
---- # ARIPI <- ARIPI
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8OO-SAME: 0 0 0 1 0 0 0 0 . 1 1 0 1 1 0 0 0
-# ---------------------------------------------------------------
-# MOV32OO-SAME: 0 0 1 0 0 0 1 0 . 1 1 0 1 1 0 0 1
-# ---------------------------------------------------------------
-# MOV32OO-SAME: 0 0 1 0 0 0 1 0 . 1 1 0 1 1 0 0 1
-name: MxMove_RM_ARIPI
-body: |
- bb.0:
- MOV8oo $a0, $a0, implicit-def $ccr
- MOV32oo $a1, $a1, implicit-def $ccr
- MOV32oo $a1, $a1, implicit-def $ccr
-
-...
---- # ARI <- ARI
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8JJ-SAME: 0 0 0 1 0 0 0 0 . 1 0 0 1 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32JJ-SAME: 0 0 1 0 0 0 1 0 . 1 0 0 1 0 0 0 1
-# ---------------------------------------------------------------
-# MOV32JJ-SAME: 0 0 1 0 0 0 1 0 . 1 0 0 1 0 0 0 1
-name: MxMove_RM_ARI
-body: |
- bb.0:
- MOV8jj $a0, $a0, implicit-def $ccr
- MOV32jj $a1, $a1, implicit-def $ccr
- MOV32jj $a1, $a1, implicit-def $ccr
-
-...
---- # ABS <- ABS
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8BB-SAME: 0 0 0 1 0 0 1 1 . 1 1 1 1 1 0 0 1
-# MOV8BB-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# MOV8BB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32BB-SAME: 0 0 1 0 0 0 1 1 . 1 1 1 1 1 0 0 1
-# MOV32BB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# MOV32BB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# MOV32BB-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# MOV32BB-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32BB-SAME: 0 0 1 0 0 0 1 1 . 1 1 1 1 1 0 0 1
-# MOV32BB-SAME: 0 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# MOV32BB-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# MOV32BB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# MOV32BB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-name: MxMove_RM_ABS
-body: |
- bb.0:
- MOV8bb 0, -1, implicit-def $ccr
- MOV32bb -1, 0, implicit-def $ccr
- MOV32bb 0, 2147483647, implicit-def $ccr
-
-...
diff --git a/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MR.mir b/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MR.mir
deleted file mode 100644
index bb269a35a09e3..0000000000000
--- a/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MR.mir
+++ /dev/null
@@ -1,81 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN: | extract-section .text \
-# RUN: | FileCheck %s -check-prefixes=MOV8FD,MOV32FR,MOV8PD,MOV32PR,MOV8JD,MOV32JR
-
-#------------------------------------------------------------------------------
-# MxMove_MR is used for moving data from register to memory
-#------------------------------------------------------------------------------
-
---- # ARII
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8FD: 0 0 0 1 0 0 0 1 . 1 0 0 0 0 0 0 0
-# MOV8FD-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV8FD-SAME: 0 0 0 1 0 0 0 1 . 1 0 0 0 0 0 0 0
-# MOV8FD-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32FR-SAME: 0 0 1 0 0 0 1 1 . 1 0 0 0 0 0 0 0
-# MOV32FR-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32FR-SAME: 0 0 1 0 0 1 0 1 . 1 0 0 0 0 0 0 1
-# MOV32FR-SAME: 1 0 1 0 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---+-----------+---+-------+---+-------------------------------
-# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
-# ---+-----------+---+-------+---+-------------------------------
-name: MxMove_MR_ARII
-body: |
- bb.0:
- MOV8fd 0, $a0, $d1, $bd0, implicit-def $ccr
- MOV8fd -1, $a0, $d1, $bd0, implicit-def $ccr
- MOV32fr 0, $a1, $d1, $d0, implicit-def $ccr
- MOV32fr 0, $a2, $a2, $d1, implicit-def $ccr
-
-...
---- # ARID
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8PD-SAME: 0 0 0 1 0 0 0 1 . 0 1 0 0 0 0 0 0
-# MOV8PD-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32PR-SAME: 0 0 1 0 0 0 1 1 . 0 1 0 0 0 0 0 0
-# MOV32PR-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32PR-SAME: 0 0 1 0 0 0 1 1 . 0 1 0 0 1 0 0 0
-# MOV32PR-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-name: MxMove_MR_ARID
-body: |
- bb.0:
- MOV8pd 0, $a0, $bd0, implicit-def $ccr
- MOV32pr -1, $a1, $d0, implicit-def $ccr
- MOV32pr -1, $a1, $a0, implicit-def $ccr
-
-...
---- # ARI
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8JD-SAME: 0 0 0 1 0 0 0 0 . 1 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32JR-SAME: 0 0 1 0 0 0 1 0 . 1 0 0 0 0 0 1 1
-# ---------------------------------------------------------------
-# MOV32JR-SAME: 0 0 1 0 0 0 1 0 . 1 0 0 0 1 1 0 0
-name: MxMove_MR_ARI
-body: |
- bb.0:
- MOV8jd $a0, $bd0, implicit-def $ccr
- MOV32jr $a1, $d3, implicit-def $ccr
- MOV32jr $a1, $a4, implicit-def $ccr
-
-...
diff --git a/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RM.mir b/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RM.mir
deleted file mode 100644
index 648db14fff390..0000000000000
--- a/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RM.mir
+++ /dev/null
@@ -1,205 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN: | extract-section .text \
-# RUN: | FileCheck %s -check-prefixes=MOV8DK,MOV32RK,MOV8DQ,MOV32RQ,MOV8DF,MOV32RF
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN: | extract-section .text \
-# RUN: | FileCheck %s -check-prefixes=MOV8DP,MOV32RP,MOV8DJ,MOV32RJ,MOV8DO,MOV32RO
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN: | extract-section .text \
-# RUN: | FileCheck %s -check-prefixes=MOV8DE,MOV32RE,MOV8DB,MOV32RB
-
-#------------------------------------------------------------------------------
-# MxMove_RM is used for moving data from memory to register
-#------------------------------------------------------------------------------
-
---- # PCI
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8DK: 0 0 0 1 0 0 0 0 . 0 0 1 1 1 0 1 1
-# MOV8DK-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV8DK-SAME: 0 0 0 1 0 0 0 0 . 0 0 1 1 1 0 1 1
-# MOV8DK-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32RK-SAME: 0 0 1 0 0 0 0 0 . 0 0 1 1 1 0 1 1
-# MOV32RK-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32RK-SAME: 0 0 1 0 0 0 1 0 . 0 0 1 1 1 0 1 1
-# MOV32RK-SAME: 1 0 1 0 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---+-----------+---+-------+---+-------------------------------
-# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
-# ---+-----------+---+-------+---+-------------------------------
-name: MxMove_RM_PCI
-body: |
- bb.0:
- $bd0 = MOV8dk 0, $d1, implicit-def $ccr
- $bd0 = MOV8dk -1, $d1, implicit-def $ccr
- $d0 = MOV32rk 0, $d1, implicit-def $ccr
- $d1 = MOV32rk 0, $a2, implicit-def $ccr
-
-...
---- # PCD
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8DQ-SAME: 0 0 0 1 0 0 0 0 . 0 0 1 1 1 0 1 0
-# MOV8DQ-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32RQ-SAME: 0 0 1 0 0 0 0 0 . 0 0 1 1 1 0 1 0
-# MOV32RQ-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32RQ-SAME: 0 0 1 0 0 0 0 0 . 0 1 1 1 1 0 1 0
-# MOV32RQ-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-name: MxMove_RM_PCD
-body: |
- bb.0:
- $bd0 = MOV8dq 0, implicit-def $ccr
- $d0 = MOV32rq -1, implicit-def $ccr
- $a0 = MOV32rq -1, implicit-def $ccr
-
-...
---- # ARII
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8DF: 0 0 0 1 0 0 0 0 . 0 0 1 1 0 0 0 0
-# MOV8DF-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV8DF-SAME: 0 0 0 1 0 0 0 0 . 0 0 1 1 0 0 0 0
-# MOV8DF-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32RF-SAME: 0 0 1 0 0 0 0 0 . 0 0 1 1 0 0 0 1
-# MOV32RF-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32RF-SAME: 0 0 1 0 0 0 1 0 . 0 0 1 1 0 0 1 0
-# MOV32RF-SAME: 1 0 1 0 1 0 0 0 . 0 0 0 0 0 0 0 0
-# ---+-----------+---+-------+---+-------------------------------
-# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
-# ---+-----------+---+-------+---+-------------------------------
-name: MxMove_RM_ARII
-body: |
- bb.0:
- $bd0 = MOV8df 0, $a0, $d1, implicit-def $ccr
- $bd0 = MOV8df -1, $a0, $d1, implicit-def $ccr
- $d0 = MOV32rf 0, $a1, $d1, implicit-def $ccr
- $d1 = MOV32rf 0, $a2, $a2, implicit-def $ccr
-
-...
---- # ARID
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8DP: 0 0 0 1 0 0 0 0 . 0 0 1 0 1 0 0 0
-# MOV8DP-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32RP-SAME: 0 0 1 0 0 0 0 0 . 0 0 1 0 1 0 0 1
-# MOV32RP-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-# ---------------------------------------------------------------
-# MOV32RP-SAME: 0 0 1 0 0 0 0 0 . 0 1 1 0 1 0 0 1
-# MOV32RP-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
-name: MxMove_RM_ARID
-body: |
- bb.0:
- $bd0 = MOV8dp 0, $a0, implicit-def $ccr
- $d0 = MOV32rp -1, $a1, implicit-def $ccr
- $a0 = MOV32rp -1, $a1, implicit-def $ccr
-
-...
---- # ARIPD
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8DE: 0 0 0 1 0 0 0 0 . 0 0 1 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32RE-SAME: 0 0 1 0 0 1 1 0 . 0 0 1 0 0 0 0 1
-# ---------------------------------------------------------------
-# MOV32RE-SAME: 0 0 1 0 1 0 0 0 . 0 1 1 0 0 0 0 1
-name: MxMove_RM_ARIPD
-body: |
- bb.0:
- $bd0 = MOV8de $a0, implicit-def $ccr
- $d3 = MOV32re $a1, implicit-def $ccr
- $a4 = MOV32re $a1, implicit-def $ccr
-
-...
---- # ARIPI
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8DO-SAME: 0 0 0 1 0 0 0 0 . 0 0 0 1 1 0 0 0
-# ---------------------------------------------------------------
-# MOV32RO-SAME: 0 0 1 0 0 1 1 0 . 0 0 0 1 1 0 0 1
-# ---------------------------------------------------------------
-# MOV32RO-SAME: 0 0 1 0 1 0 0 0 . 0 1 0 1 1 0 0 1
-name: MxMove_RM_ARIPI
-body: |
- bb.0:
- $bd0 = MOV8do $a0, implicit-def $ccr
- $d3 = MOV32ro $a1, implicit-def $ccr
- $a4 = MOV32ro $a1, implicit-def $ccr
-
-...
---- # ARI
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8DJ-SAME: 0 0 0 1 0 0 0 0 . 0 0 0 1 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32RJ-SAME: 0 0 1 0 0 1 1 0 . 0 0 0 1 0 0 0 1
-# ---------------------------------------------------------------
-# MOV32RJ-SAME: 0 0 1 0 1 0 0 0 . 0 1 0 1 0 0 0 1
-name: MxMove_RM_ARI
-body: |
- bb.0:
- $bd0 = MOV8dj $a0, implicit-def $ccr
- $d3 = MOV32rj $a1, implicit-def $ccr
- $a4 = MOV32rj $a1, implicit-def $ccr
-
-...
---- # ABS
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8DB-SAME: 0 0 0 1 0 0 0 0 . 0 0 1 1 1 0 0 1
-# MOV8DB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32RB-SAME: 0 0 1 0 0 1 1 0 . 0 0 1 1 1 0 0 1
-# MOV32RB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# MOV32RB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# ---------------------------------------------------------------
-# MOV32RB-SAME: 0 0 1 0 1 0 0 0 . 0 1 1 1 1 0 0 1
-# MOV32RB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-# MOV32RB-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
-name: MxMove_RM_ABS
-body: |
- bb.0:
- $bd0 = MOV8db 0, implicit-def $ccr
- $d3 = MOV32rb 0, implicit-def $ccr
- $a4 = MOV32rb 0, implicit-def $ccr
-
-...
diff --git a/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RR.mir b/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RR.mir
deleted file mode 100644
index a71dea90f1e6e..0000000000000
--- a/llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RR.mir
+++ /dev/null
@@ -1,30 +0,0 @@
-# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
-# RUN: | extract-section .text \
-# RUN: | FileCheck %s -check-prefixes=MOV8DD,MOV16RA,MOV32RR
-
-#------------------------------------------------------------------------------
-# MxMove_RR moves data from register to register
-#------------------------------------------------------------------------------
-
-
-# ---------------------------+-----------+-----------+-----------
-# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
-# -------+-------+-----------+-----------+-----------+-----------
-# | | DESTINATION | SOURCE
-# 0 0 | SIZE | REG | MODE | MODE | REG
-# -------+-------+-----------+-----------+-----------+-----------
-# MOV8DD: 0 0 0 1 0 0 1 0 . 0 0 0 0 0 0 0 0
-# MOV16RA-SAME: 0 0 1 1 0 1 1 0 . 0 0 0 0 1 0 1 0
-# MOV16RA-SAME: 0 0 1 1 1 1 0 0 . 0 1 0 0 1 0 1 0
-# MOV16RA-SAME: 0 0 1 1 0 0 1 0 . 0 0 0 0 1 0 1 0
-# MOV32RR-SAME: 0 0 1 0 0 0 1 0 . 0 0 0 0 0 0 1 0
-# MOV32RR-SAME: 0 0 1 0 0 0 1 0 . 0 1 0 0 1 0 1 0
-name: MxMove_RR
-body: |
- bb.0:
- $bd1 = MOV8dd $bd0, implicit-def $ccr
- $wd3 = MOV16ra $wa2, implicit-def $ccr
- $wa6 = MOV16ra $wa2, implicit-def $ccr
- $wd1 = MOV16ra $wa2, implicit-def $ccr
- $d1 = MOV32rr $d2, implicit-def $ccr
- $a1 = MOV32rr $a2, implicit-def $ccr
diff --git a/llvm/test/MC/M68k/Data/Classes/MxMove_MM.s b/llvm/test/MC/M68k/Data/Classes/MxMove_MM.s
new file mode 100644
index 0000000000000..e10c5ac06424d
--- /dev/null
+++ b/llvm/test/MC/M68k/Data/Classes/MxMove_MM.s
@@ -0,0 +1,90 @@
+; RUN: llvm-mc -triple=m68k -motorola-integers -show-encoding %s | FileCheck %s
+
+; CHECK: move.b (0,%pc,%d1), (%a0)
+; CHECK-SAME: encoding: [0x10,0xbb,0x18,0x00]
+move.b (0,%pc,%d1), (%a0)
+; CHECK: move.b (-1,%pc,%d1), (%a0)
+; CHECK-SAME: encoding: [0x10,0xbb,0x18,0xff]
+move.b (-1,%pc,%d1), (%a0)
+; CHECK: move.l (0,%pc,%d1), (%a0)
+; CHECK-SAME: encoding: [0x20,0xbb,0x18,0x00]
+move.l (0,%pc,%d1), (%a0)
+; CHECK: move.l (0,%pc,%a2), (%a1)
+; CHECK-SAME: encoding: [0x22,0xbb,0xa8,0x00]
+move.l (0,%pc,%a2), (%a1)
+
+; CHECK: move.b (0,%pc), (%a0)
+; CHECK-SAME: encoding: [0x10,0xba,0x00,0x00]
+move.b (0,%pc), (%a0)
+; CHECK: move.l (-1,%pc), (%a0)
+; CHECK-SAME: encoding: [0x20,0xba,0xff,0xff]
+move.l (-1,%pc), (%a0)
+; CHECK: move.l (-1,%pc), (%a0)
+; CHECK-SAME: encoding: [0x20,0xba,0xff,0xff]
+move.l (-1,%pc), (%a0)
+
+; CHECK: move.b (0,%a0,%d1), (-1,%a0,%d1)
+; CHECK-SAME: encoding: [0x11,0xb0,0x18,0x00,0x18,0xff]
+move.b (0,%a0,%d1), (-1,%a0,%d1)
+; CHECK: move.b (-1,%a0,%d1), (-1,%a0,%d1)
+; CHECK-SAME: encoding: [0x11,0xb0,0x18,0xff,0x18,0xff]
+move.b (-1,%a0,%d1), (-1,%a0,%d1)
+; CHECK: move.l (0,%a1,%d1), (0,%a1,%d1)
+; CHECK-SAME: encoding: [0x23,0xb1,0x18,0x00,0x18,0x00]
+move.l (0,%a1,%d1), (0,%a1,%d1)
+; CHECK: move.l (42,%a2,%a2), (0,%a2,%a2)
+; CHECK-SAME: encoding: [0x25,0xb2,0xa8,0x2a,0xa8,0x00]
+move.l (42,%a2,%a2), (0,%a2,%a2)
+
+; CHECK: move.b (0,%a0), (0,%a0)
+; CHECK-SAME: encoding: [0x11,0x68,0x00,0x00,0x00,0x00]
+move.b (0,%a0), (0,%a0)
+; CHECK: move.l (-1,%a1), (0,%a1)
+; CHECK-SAME: encoding: [0x23,0x69,0xff,0xff,0x00,0x00]
+move.l (-1,%a1), (0,%a1)
+; CHECK: move.l (42,%a1), (-1,%a1)
+; CHECK-SAME: encoding: [0x23,0x69,0x00,0x2a,0xff,0xff]
+move.l (42,%a1), (-1,%a1)
+
+; CHECK: move.b -(%a0), -(%a0)
+; CHECK-SAME: encoding: [0x11,0x20]
+move.b -(%a0), -(%a0)
+; CHECK: move.l -(%a1), -(%a1)
+; CHECK-SAME: encoding: [0x23,0x21]
+move.l -(%a1), -(%a1)
+; CHECK: move.l -(%a1), -(%a1)
+; CHECK-SAME: encoding: [0x23,0x21]
+move.l -(%a1), -(%a1)
+
+; CHECK: move.b (%a0)+, (%a0)+
+; CHECK-SAME: encoding: [0x10,0xd8]
+move.b (%a0)+, (%a0)+
+; CHECK: move.l (%a1)+, (%a1)+
+; CHECK-SAME: encoding: [0x22,0xd9]
+move.l (%a1)+, (%a1)+
+; CHECK: move.l (%a1)+, (%a1)+
+; CHECK-SAME: encoding: [0x22,0xd9]
+move.l (%a1)+, (%a1)+
+
+; CHECK: move.b (%a0), (%a0)
+; CHECK-SAME: encoding: [0x10,0x90]
+move.b (%a0), (%a0)
+; CHECK: move.l (%a1), (%a1)
+; CHECK-SAME: encoding: [0x22,0x91]
+move.l (%a1), (%a1)
+; CHECK: move.l (%a1), (%a1)
+; CHECK-SAME: encoding: [0x22,0x91]
+move.l (%a1), (%a1)
+
+// FIXME: Currently we don't have the 'B' encoding
+// (i.e. abs.W) so we're always using 32-bit absolute address.
+; CHECK: move.b $ffffffffffffffff, $0
+; CHECK-SAME: encoding: [0x13,0xf9,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00]
+move.b $ffffffffffffffff, $0
+; CHECK: move.l $0, $ffffffffffffffff
+; CHECK-SAME: encoding: [0x23,0xf9,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff]
+move.l $0, $ffffffffffffffff
+; CHECK: move.l $7fffffff, $0
+; CHECK-SAME: encoding: [0x23,0xf9,0x7f,0xff,0xff,0xff,0x00,0x00,0x00,0x00]
+move.l $7fffffff, $0
+
diff --git a/llvm/test/MC/M68k/Data/Classes/MxMove_MR.s b/llvm/test/MC/M68k/Data/Classes/MxMove_MR.s
new file mode 100644
index 0000000000000..6f81029f0c5ef
--- /dev/null
+++ b/llvm/test/MC/M68k/Data/Classes/MxMove_MR.s
@@ -0,0 +1,44 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+ .text
+ .globl MxMove_MR_ARII
+; CHECK-LABEL: MxMove_MR_ARII:
+MxMove_MR_ARII:
+ ; CHECK: move.b %d0, (0,%a0,%d1)
+ ; CHECK-SAME: encoding: [0x11,0x80,0x18,0x00]
+ move.b %d0, (0,%a0,%d1)
+ ; CHECK: move.b %d0, (-1,%a0,%d1)
+ ; CHECK-SAME: encoding: [0x11,0x80,0x18,0xff]
+ move.b %d0, (-1,%a0,%d1)
+ ; CHECK: move.l %d0, (0,%a1,%d1)
+ ; CHECK-SAME: encoding: [0x23,0x80,0x18,0x00]
+ move.l %d0, (0,%a1,%d1)
+ ; CHECK: move.l %d1, (0,%a2,%a2)
+ ; CHECK-SAME: encoding: [0x25,0x81,0xa8,0x00]
+ move.l %d1, (0,%a2,%a2)
+
+ .globl MxMove_MR_ARID
+; CHECK-LABEL: MxMove_MR_ARID:
+MxMove_MR_ARID:
+ ; CHECK: move.b %d0, (0,%a0)
+ ; CHECK-SAME: encoding: [0x11,0x40,0x00,0x00]
+ move.b %d0, (0,%a0)
+ ; CHECK: move.l %d0, (-1,%a1)
+ ; CHECK-SAME: encoding: [0x23,0x40,0xff,0xff]
+ move.l %d0, (-1,%a1)
+ ; CHECK: move.l %a0, (-1,%a1)
+ ; CHECK-SAME: encoding: [0x23,0x48,0xff,0xff]
+ move.l %a0, (-1,%a1)
+
+ .globl MxMove_MR_ARI
+; CHECK-LABEL: MxMove_MR_ARI:
+MxMove_MR_ARI:
+ ; CHECK: move.b %d0, (%a0)
+ ; CHECK-SAME: encoding: [0x10,0x80]
+ move.b %d0, (%a0)
+ ; CHECK: move.l %d3, (%a1)
+ ; CHECK-SAME: encoding: [0x22,0x83]
+ move.l %d3, (%a1)
+ ; CHECK: move.l %a4, (%a1)
+ ; CHECK-SAME: encoding: [0x22,0x8c]
+ move.l %a4, (%a1)
+
diff --git a/llvm/test/MC/M68k/Data/Classes/MxMove_RM.s b/llvm/test/MC/M68k/Data/Classes/MxMove_RM.s
new file mode 100644
index 0000000000000..5d640b9b32c5f
--- /dev/null
+++ b/llvm/test/MC/M68k/Data/Classes/MxMove_RM.s
@@ -0,0 +1,90 @@
+; RUN: llvm-mc -triple=m68k -motorola-integers -show-encoding %s | FileCheck %s
+
+; CHECK: move.b (0,%pc,%d1), %d0
+; CHECK-SAME: encoding: [0x10,0x3b,0x18,0x00]
+move.b (0,%pc,%d1), %d0
+; CHECK: move.b (-1,%pc,%d1), %d0
+; CHECK-SAME: encoding: [0x10,0x3b,0x18,0xff]
+move.b (-1,%pc,%d1), %d0
+; CHECK: move.l (0,%pc,%d1), %d0
+; CHECK-SAME: encoding: [0x20,0x3b,0x18,0x00]
+move.l (0,%pc,%d1), %d0
+; CHECK: move.l (0,%pc,%a2), %d1
+; CHECK-SAME: encoding: [0x22,0x3b,0xa8,0x00]
+move.l (0,%pc,%a2), %d1
+
+; CHECK: move.b (0,%pc), %d0
+; CHECK-SAME: encoding: [0x10,0x3a,0x00,0x00]
+move.b (0,%pc), %d0
+; CHECK: move.l (-1,%pc), %d0
+; CHECK-SAME: encoding: [0x20,0x3a,0xff,0xff]
+move.l (-1,%pc), %d0
+; CHECK: move.l (-1,%pc), %a0
+; CHECK-SAME: encoding: [0x20,0x7a,0xff,0xff]
+move.l (-1,%pc), %a0
+
+; CHECK: move.b (0,%a0,%d1), %d0
+; CHECK-SAME: encoding: [0x10,0x30,0x18,0x00]
+move.b (0,%a0,%d1), %d0
+; CHECK: move.b (-1,%a0,%d1), %d0
+; CHECK-SAME: encoding: [0x10,0x30,0x18,0xff]
+move.b (-1,%a0,%d1), %d0
+; CHECK: move.l (0,%a1,%d1), %d0
+; CHECK-SAME: encoding: [0x20,0x31,0x18,0x00]
+move.l (0,%a1,%d1), %d0
+; CHECK: move.l (0,%a2,%a2), %d1
+; CHECK-SAME: encoding: [0x22,0x32,0xa8,0x00]
+move.l (0,%a2,%a2), %d1
+
+; CHECK: move.b (0,%a0), %d0
+; CHECK-SAME: encoding: [0x10,0x28,0x00,0x00]
+move.b (0,%a0), %d0
+; CHECK: move.l (-1,%a1), %d0
+; CHECK-SAME: encoding: [0x20,0x29,0xff,0xff]
+move.l (-1,%a1), %d0
+; CHECK: move.l (-1,%a1), %a0
+; CHECK-SAME: encoding: [0x20,0x69,0xff,0xff]
+move.l (-1,%a1), %a0
+
+; CHECK: move.b -(%a0), %d0
+; CHECK-SAME: encoding: [0x10,0x20]
+move.b -(%a0), %d0
+; CHECK: move.l -(%a1), %d3
+; CHECK-SAME: encoding: [0x26,0x21]
+move.l -(%a1), %d3
+; CHECK: move.l -(%a1), %a4
+; CHECK-SAME: encoding: [0x28,0x61]
+move.l -(%a1), %a4
+
+; CHECK: move.b (%a0)+, %d0
+; CHECK-SAME: encoding: [0x10,0x18]
+move.b (%a0)+, %d0
+; CHECK: move.l (%a1)+, %d3
+; CHECK-SAME: encoding: [0x26,0x19]
+move.l (%a1)+, %d3
+; CHECK: move.l (%a1)+, %a4
+; CHECK-SAME: encoding: [0x28,0x59]
+move.l (%a1)+, %a4
+
+; CHECK: move.b (%a0), %d0
+; CHECK-SAME: encoding: [0x10,0x10]
+move.b (%a0), %d0
+; CHECK: move.l (%a1), %d3
+; CHECK-SAME: encoding: [0x26,0x11]
+move.l (%a1), %d3
+; CHECK: move.l (%a1), %a4
+; CHECK-SAME: encoding: [0x28,0x51]
+move.l (%a1), %a4
+
+// FIXME: Currently we don't have the 'B' encoding
+// (i.e. abs.W) so we're always using 32-bit absolute address.
+; CHECK: move.b $0, %d0
+; CHECK-SAME: encoding: [0x10,0x39,0x00,0x00,0x00,0x00]
+move.b $0, %d0
+; CHECK: move.l $0, %d3
+; CHECK-SAME: encoding: [0x26,0x39,0x00,0x00,0x00,0x00]
+move.l $0, %d3
+; CHECK: move.l $0, %a4
+; CHECK-SAME: encoding: [0x28,0x79,0x00,0x00,0x00,0x00]
+move.l $0, %a4
+
diff --git a/llvm/test/MC/M68k/Data/Classes/MxMove_RR.s b/llvm/test/MC/M68k/Data/Classes/MxMove_RR.s
new file mode 100644
index 0000000000000..9dada3e3c571c
--- /dev/null
+++ b/llvm/test/MC/M68k/Data/Classes/MxMove_RR.s
@@ -0,0 +1,24 @@
+; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
+ .text
+ .globl MxMove_RR
+; CHECK-LABEL: MxMove_RR:
+MxMove_RR:
+ ; CHECK: move.b %d0, %d1
+ ; CHECK-SAME: encoding: [0x12,0x00]
+ move.b %d0, %d1
+ ; CHECK: move.w %a2, %d3
+ ; CHECK-SAME: encoding: [0x36,0x0a]
+ move.w %a2, %d3
+ ; CHECK: move.w %a2, %a6
+ ; CHECK-SAME: encoding: [0x3c,0x4a]
+ move.w %a2, %a6
+ ; CHECK: move.w %a2, %d1
+ ; CHECK-SAME: encoding: [0x32,0x0a]
+ move.w %a2, %d1
+ ; CHECK: move.l %d2, %d1
+ ; CHECK-SAME: encoding: [0x22,0x02]
+ move.l %d2, %d1
+ ; CHECK: move.l %a2, %a1
+ ; CHECK-SAME: encoding: [0x22,0x4a]
+ move.l %a2, %a1
+
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