[llvm] 7165e67 - [PowerPC] Use int64_t to represent stack object offset and frame size
Kai Luo via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 22 19:13:28 PDT 2021
Author: Kai Luo
Date: 2021-08-23T02:13:21Z
New Revision: 7165e6713f9f43816bb8960279c98a5e364416a5
URL: https://github.com/llvm/llvm-project/commit/7165e6713f9f43816bb8960279c98a5e364416a5
DIFF: https://github.com/llvm/llvm-project/commit/7165e6713f9f43816bb8960279c98a5e364416a5.diff
LOG: [PowerPC] Use int64_t to represent stack object offset and frame size
This is the first step to enable PPC64 support huge frame size(>2G). Also fix an assertion error for frame size, i.e.,`int x; !isInt<32>(x);` should be always evaluated false, so the guard code for frame size is impossible to hit.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D107435
Added:
llvm/test/CodeGen/PowerPC/huge-frame-size.ll
Modified:
llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
llvm/lib/Target/PowerPC/PPCFrameLowering.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
index 1de6b633d20ab..fc3c7ec35b8d9 100644
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -279,11 +279,11 @@ static bool MustSaveLR(const MachineFunction &MF, unsigned LR) {
/// determineFrameLayoutAndUpdate - Determine the size of the frame and maximum
/// call frame size. Update the MachineFunction object with the stack size.
-unsigned
+uint64_t
PPCFrameLowering::determineFrameLayoutAndUpdate(MachineFunction &MF,
bool UseEstimate) const {
unsigned NewMaxCallFrameSize = 0;
- unsigned FrameSize = determineFrameLayout(MF, UseEstimate,
+ uint64_t FrameSize = determineFrameLayout(MF, UseEstimate,
&NewMaxCallFrameSize);
MF.getFrameInfo().setStackSize(FrameSize);
MF.getFrameInfo().setMaxCallFrameSize(NewMaxCallFrameSize);
@@ -292,7 +292,7 @@ PPCFrameLowering::determineFrameLayoutAndUpdate(MachineFunction &MF,
/// determineFrameLayout - Determine the size of the frame and maximum call
/// frame size.
-unsigned
+uint64_t
PPCFrameLowering::determineFrameLayout(const MachineFunction &MF,
bool UseEstimate,
unsigned *NewMaxCallFrameSize) const {
@@ -300,7 +300,7 @@ PPCFrameLowering::determineFrameLayout(const MachineFunction &MF,
const PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
// Get the number of bytes to allocate from the FrameInfo
- unsigned FrameSize =
+ uint64_t FrameSize =
UseEstimate ? MFI.estimateStackSize(MF) : MFI.getStackSize();
// Get stack alignments. The frame must be aligned to the greatest of these:
@@ -624,9 +624,9 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
assert((isSVR4ABI || Subtarget.isAIXABI()) && "Unsupported PPC ABI.");
// Work out frame sizes.
- unsigned FrameSize = determineFrameLayoutAndUpdate(MF);
- int NegFrameSize = -FrameSize;
- if (!isInt<32>(NegFrameSize))
+ uint64_t FrameSize = determineFrameLayoutAndUpdate(MF);
+ int64_t NegFrameSize = -FrameSize;
+ if (!isInt<32>(FrameSize) || !isInt<32>(NegFrameSize))
llvm_unreachable("Unhandled stack size!");
if (MFI.isFrameAddressTaken())
@@ -692,9 +692,9 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
SingleScratchReg = ScratchReg == TempReg;
- int LROffset = getReturnSaveOffset();
+ int64_t LROffset = getReturnSaveOffset();
- int FPOffset = 0;
+ int64_t FPOffset = 0;
if (HasFP) {
MachineFrameInfo &MFI = MF.getFrameInfo();
int FPIndex = FI->getFramePointerSaveIndex();
@@ -702,7 +702,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
FPOffset = MFI.getObjectOffset(FPIndex);
}
- int BPOffset = 0;
+ int64_t BPOffset = 0;
if (HasBP) {
MachineFrameInfo &MFI = MF.getFrameInfo();
int BPIndex = FI->getBasePointerSaveIndex();
@@ -710,7 +710,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
BPOffset = MFI.getObjectOffset(BPIndex);
}
- int PBPOffset = 0;
+ int64_t PBPOffset = 0;
if (FI->usesPICBase()) {
MachineFrameInfo &MFI = MF.getFrameInfo();
int PBPIndex = FI->getPICBasePointerSaveIndex();
@@ -854,7 +854,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
// ABI.
if (HasROPProtect) {
const int SaveIndex = FI->getROPProtectionHashSaveIndex();
- const int ImmOffset = MFI.getObjectOffset(SaveIndex);
+ const int64_t ImmOffset = MFI.getObjectOffset(SaveIndex);
assert((ImmOffset <= -8 && ImmOffset >= -512) &&
"ROP hash save offset out of range.");
assert(((ImmOffset & 0x7) == 0) &&
@@ -1212,7 +1212,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIRegister);
} else {
- int Offset = MFI.getObjectOffset(CSI[I].getFrameIdx());
+ int64_t Offset = MFI.getObjectOffset(CSI[I].getFrameIdx());
// We have changed the object offset above but we do not want to change
// the actual offsets in the CFI instruction so we have to undo the
// offset change here.
@@ -1550,7 +1550,7 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
const MachineFrameInfo &MFI = MF.getFrameInfo();
// Get the number of bytes allocated from the FrameInfo.
- int FrameSize = MFI.getStackSize();
+ int64_t FrameSize = MFI.getStackSize();
// Get processor type.
bool isPPC64 = Subtarget.isPPC64();
@@ -1592,9 +1592,9 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
: PPC::MTOCRF);
const MCInstrDesc &HashChk =
TII.get(HasPrivileged ? PPC::HASHCHKP : PPC::HASHCHK);
- int LROffset = getReturnSaveOffset();
+ int64_t LROffset = getReturnSaveOffset();
- int FPOffset = 0;
+ int64_t FPOffset = 0;
// Using the same bool variable as below to suppress compiler warnings.
bool SingleScratchReg = findScratchRegister(&MBB, true, false, &ScratchReg,
@@ -1610,14 +1610,14 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
FPOffset = MFI.getObjectOffset(FPIndex);
}
- int BPOffset = 0;
+ int64_t BPOffset = 0;
if (HasBP) {
int BPIndex = FI->getBasePointerSaveIndex();
assert(BPIndex && "No Base Pointer Save Slot!");
BPOffset = MFI.getObjectOffset(BPIndex);
}
- int PBPOffset = 0;
+ int64_t PBPOffset = 0;
if (FI->usesPICBase()) {
int PBPIndex = FI->getPICBasePointerSaveIndex();
assert(PBPIndex && "No PIC Base Pointer Save Slot!");
@@ -1865,7 +1865,7 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
// hash and then compare it to the hash stored in the prologue.
if (HasROPProtect) {
const int SaveIndex = FI->getROPProtectionHashSaveIndex();
- const int ImmOffset = MFI.getObjectOffset(SaveIndex);
+ const int64_t ImmOffset = MFI.getObjectOffset(SaveIndex);
assert((ImmOffset <= -8 && ImmOffset >= -512) &&
"ROP hash check location offset out of range.");
assert(((ImmOffset & 0x7) == 0) &&
@@ -2680,15 +2680,15 @@ bool PPCFrameLowering::restoreCalleeSavedRegisters(
return true;
}
-unsigned PPCFrameLowering::getTOCSaveOffset() const {
+uint64_t PPCFrameLowering::getTOCSaveOffset() const {
return TOCSaveOffset;
}
-unsigned PPCFrameLowering::getFramePointerSaveOffset() const {
+uint64_t PPCFrameLowering::getFramePointerSaveOffset() const {
return FramePointerSaveOffset;
}
-unsigned PPCFrameLowering::getBasePointerSaveOffset() const {
+uint64_t PPCFrameLowering::getBasePointerSaveOffset() const {
return BasePointerSaveOffset;
}
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.h b/llvm/lib/Target/PowerPC/PPCFrameLowering.h
index b378c27399254..21883b19a5755 100644
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.h
@@ -21,12 +21,12 @@ class PPCSubtarget;
class PPCFrameLowering: public TargetFrameLowering {
const PPCSubtarget &Subtarget;
- const unsigned ReturnSaveOffset;
- const unsigned TOCSaveOffset;
- const unsigned FramePointerSaveOffset;
+ const uint64_t ReturnSaveOffset;
+ const uint64_t TOCSaveOffset;
+ const uint64_t FramePointerSaveOffset;
const unsigned LinkageSize;
- const unsigned BasePointerSaveOffset;
- const unsigned CRSaveOffset;
+ const uint64_t BasePointerSaveOffset;
+ const uint64_t CRSaveOffset;
// Map each group of one or two GPRs to corresponding VSR for spilling.
// TODO: Use local table in methods to avoid this mutable member.
@@ -88,7 +88,7 @@ class PPCFrameLowering: public TargetFrameLowering {
/**
* Determine the frame layout and update the machine function.
*/
- unsigned determineFrameLayoutAndUpdate(MachineFunction &MF,
+ uint64_t determineFrameLayoutAndUpdate(MachineFunction &MF,
bool UseEstimate = false) const;
/**
@@ -96,7 +96,7 @@ class PPCFrameLowering: public TargetFrameLowering {
* The MachineFunction object can be const in this case as it is not
* modified.
*/
- unsigned determineFrameLayout(const MachineFunction &MF,
+ uint64_t determineFrameLayout(const MachineFunction &MF,
bool UseEstimate = false,
unsigned *NewMaxCallFrameSize = nullptr) const;
@@ -146,19 +146,19 @@ class PPCFrameLowering: public TargetFrameLowering {
/// getReturnSaveOffset - Return the previous frame offset to save the
/// return address.
- unsigned getReturnSaveOffset() const { return ReturnSaveOffset; }
+ uint64_t getReturnSaveOffset() const { return ReturnSaveOffset; }
/// getTOCSaveOffset - Return the previous frame offset to save the
/// TOC register -- 64-bit SVR4 ABI only.
- unsigned getTOCSaveOffset() const;
+ uint64_t getTOCSaveOffset() const;
/// getFramePointerSaveOffset - Return the previous frame offset to save the
/// frame pointer.
- unsigned getFramePointerSaveOffset() const;
+ uint64_t getFramePointerSaveOffset() const;
/// getBasePointerSaveOffset - Return the previous frame offset to save the
/// base pointer.
- unsigned getBasePointerSaveOffset() const;
+ uint64_t getBasePointerSaveOffset() const;
/// getLinkageSize - Return the size of the PowerPC ABI linkage area.
///
diff --git a/llvm/test/CodeGen/PowerPC/huge-frame-size.ll b/llvm/test/CodeGen/PowerPC/huge-frame-size.ll
new file mode 100644
index 0000000000000..b3af89cad7c4d
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/huge-frame-size.ll
@@ -0,0 +1,17 @@
+; REQUIRES: asserts
+; RUN: not --crash llc -verify-machineinstrs -mtriple=powerpc64le-linux-gnu < %s \
+; RUN: 2>&1 | FileCheck --check-prefix=CHECK-LE %s
+; RUN: not --crash llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff < %s \
+; RUN: 2>&1 | FileCheck --check-prefix=CHECK-BE %s
+
+declare void @bar(i8*)
+
+define void @foo(i8 %x) {
+; CHECK-LE: Unhandled stack size
+; CHECK-BE: Unhandled stack size
+entry:
+ %a = alloca i8, i64 4294967296, align 16
+ %b = getelementptr i8, i8* %a, i64 0
+ store volatile i8 %x, i8* %b
+ ret void
+}
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