[llvm] be4b836 - [InstCombine] Add tests for "eq of parts" with logical op (NFC)

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 22 07:59:50 PDT 2021


Author: Nikita Popov
Date: 2021-08-22T16:52:44+02:00
New Revision: be4b8366fbd2c67b48a743d3e34837e29d6b8d0e

URL: https://github.com/llvm/llvm-project/commit/be4b8366fbd2c67b48a743d3e34837e29d6b8d0e
DIFF: https://github.com/llvm/llvm-project/commit/be4b8366fbd2c67b48a743d3e34837e29d6b8d0e.diff

LOG: [InstCombine] Add tests for "eq of parts" with logical op (NFC)

We currently only handle this with a bitwise and/or instruction,
but not a logical.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/eq-of-parts.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/eq-of-parts.ll b/llvm/test/Transforms/InstCombine/eq-of-parts.ll
index 3e7ac275e384..2b52e186e8a4 100644
--- a/llvm/test/Transforms/InstCombine/eq-of-parts.ll
+++ b/llvm/test/Transforms/InstCombine/eq-of-parts.ll
@@ -352,6 +352,37 @@ define i1 @eq_21_extra_use_eq2(i32 %x, i32 %y) {
   ret i1 %c.210
 }
 
+; Logical and instead of bitwise and.
+
+define i1 @eq_21_logical(i32 %x, i32 %y) {
+; CHECK-LABEL: @eq_21_logical(
+; CHECK-NEXT:    [[X_321:%.*]] = lshr i32 [[X:%.*]], 8
+; CHECK-NEXT:    [[X_1:%.*]] = trunc i32 [[X_321]] to i8
+; CHECK-NEXT:    [[X_32:%.*]] = lshr i32 [[X]], 16
+; CHECK-NEXT:    [[X_2:%.*]] = trunc i32 [[X_32]] to i8
+; CHECK-NEXT:    [[Y_321:%.*]] = lshr i32 [[Y:%.*]], 8
+; CHECK-NEXT:    [[Y_1:%.*]] = trunc i32 [[Y_321]] to i8
+; CHECK-NEXT:    [[Y_32:%.*]] = lshr i32 [[Y]], 16
+; CHECK-NEXT:    [[Y_2:%.*]] = trunc i32 [[Y_32]] to i8
+; CHECK-NEXT:    [[C_1:%.*]] = icmp eq i8 [[X_1]], [[Y_1]]
+; CHECK-NEXT:    [[C_2:%.*]] = icmp eq i8 [[X_2]], [[Y_2]]
+; CHECK-NEXT:    [[C_210:%.*]] = select i1 [[C_2]], i1 [[C_1]], i1 false
+; CHECK-NEXT:    ret i1 [[C_210]]
+;
+  %x.321 = lshr i32 %x, 8
+  %x.1 = trunc i32 %x.321 to i8
+  %x.32 = lshr i32 %x, 16
+  %x.2 = trunc i32 %x.32 to i8
+  %y.321 = lshr i32 %y, 8
+  %y.1 = trunc i32 %y.321 to i8
+  %y.32 = lshr i32 %y, 16
+  %y.2 = trunc i32 %y.32 to i8
+  %c.1 = icmp eq i8 %x.1, %y.1
+  %c.2 = icmp eq i8 %x.2, %y.2
+  %c.210 = select i1 %c.2, i1 %c.1, i1 false
+  ret i1 %c.210
+}
+
 ; Negative tests.
 
 define i1 @eq_21_wrong_op1(i32 %x, i32 %y, i32 %z) {
@@ -992,6 +1023,37 @@ define i1 @ne_21_extra_use_ne2(i32 %x, i32 %y) {
   ret i1 %c.210
 }
 
+; Logical or instead of bitwise or.
+
+define i1 @ne_21_logical(i32 %x, i32 %y) {
+; CHECK-LABEL: @ne_21_logical(
+; CHECK-NEXT:    [[X_321:%.*]] = lshr i32 [[X:%.*]], 8
+; CHECK-NEXT:    [[X_1:%.*]] = trunc i32 [[X_321]] to i8
+; CHECK-NEXT:    [[X_32:%.*]] = lshr i32 [[X]], 16
+; CHECK-NEXT:    [[X_2:%.*]] = trunc i32 [[X_32]] to i8
+; CHECK-NEXT:    [[Y_321:%.*]] = lshr i32 [[Y:%.*]], 8
+; CHECK-NEXT:    [[Y_1:%.*]] = trunc i32 [[Y_321]] to i8
+; CHECK-NEXT:    [[Y_32:%.*]] = lshr i32 [[Y]], 16
+; CHECK-NEXT:    [[Y_2:%.*]] = trunc i32 [[Y_32]] to i8
+; CHECK-NEXT:    [[C_1:%.*]] = icmp ne i8 [[X_1]], [[Y_1]]
+; CHECK-NEXT:    [[C_2:%.*]] = icmp ne i8 [[X_2]], [[Y_2]]
+; CHECK-NEXT:    [[C_210:%.*]] = select i1 [[C_2]], i1 true, i1 [[C_1]]
+; CHECK-NEXT:    ret i1 [[C_210]]
+;
+  %x.321 = lshr i32 %x, 8
+  %x.1 = trunc i32 %x.321 to i8
+  %x.32 = lshr i32 %x, 16
+  %x.2 = trunc i32 %x.32 to i8
+  %y.321 = lshr i32 %y, 8
+  %y.1 = trunc i32 %y.321 to i8
+  %y.32 = lshr i32 %y, 16
+  %y.2 = trunc i32 %y.32 to i8
+  %c.1 = icmp ne i8 %x.1, %y.1
+  %c.2 = icmp ne i8 %x.2, %y.2
+  %c.210 = select i1 %c.2, i1 true, i1 %c.1
+  ret i1 %c.210
+}
+
 ; Negative tests.
 
 define i1 @ne_21_wrong_op1(i32 %x, i32 %y, i32 %z) {


        


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