[llvm] d41e308 - [InstSimplify] fold rotate of zero to zero

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2021-08-22T09:15:48-04:00
New Revision: d41e308f109e0b79c58f939bf01986dd88668e81

URL: https://github.com/llvm/llvm-project/commit/d41e308f109e0b79c58f939bf01986dd88668e81
DIFF: https://github.com/llvm/llvm-project/commit/d41e308f109e0b79c58f939bf01986dd88668e81.diff

LOG: [InstSimplify] fold rotate of zero to zero

This is part of solving more general rotate patterns seen in
bugs related to:
https://llvm.org/PR51575

https://alive2.llvm.org/ce/z/fjKwqv

Added: 
    

Modified: 
    llvm/lib/Analysis/InstructionSimplify.cpp
    llvm/test/Transforms/InstSimplify/call.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index b30cd799f8c5..9c51fe9a6ae7 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -5855,6 +5855,11 @@ static Value *simplifyIntrinsic(CallBase *Call, const SimplifyQuery &Q) {
       if (ShAmtC->urem(BitWidth).isNullValue())
         return Call->getArgOperand(IID == Intrinsic::fshl ? 0 : 1);
     }
+
+    // Rotating zero by anything is zero.
+    if (match(Op0, m_Zero()) && match(Op1, m_Zero()))
+      return ConstantInt::getNullValue(F->getReturnType());
+
     return nullptr;
   }
   case Intrinsic::experimental_constrained_fma: {

diff  --git a/llvm/test/Transforms/InstSimplify/call.ll b/llvm/test/Transforms/InstSimplify/call.ll
index caf9fcf68b10..b2c6f238425a 100644
--- a/llvm/test/Transforms/InstSimplify/call.ll
+++ b/llvm/test/Transforms/InstSimplify/call.ll
@@ -960,8 +960,7 @@ define i9 @fshr_ops_poison6() {
 
 define i8 @fshl_zero(i8 %shamt) {
 ; CHECK-LABEL: @fshl_zero(
-; CHECK-NEXT:    [[R:%.*]] = call i8 @llvm.fshl.i8(i8 0, i8 0, i8 [[SHAMT:%.*]])
-; CHECK-NEXT:    ret i8 [[R]]
+; CHECK-NEXT:    ret i8 0
 ;
   %r = call i8 @llvm.fshl.i8(i8 0, i8 0, i8 %shamt)
   ret i8 %r
@@ -969,8 +968,7 @@ define i8 @fshl_zero(i8 %shamt) {
 
 define <2 x i8> @fshr_zero_vec(<2 x i8> %shamt) {
 ; CHECK-LABEL: @fshr_zero_vec(
-; CHECK-NEXT:    [[R:%.*]] = call <2 x i8> @llvm.fshr.v2i8(<2 x i8> zeroinitializer, <2 x i8> <i8 0, i8 undef>, <2 x i8> [[SHAMT:%.*]])
-; CHECK-NEXT:    ret <2 x i8> [[R]]
+; CHECK-NEXT:    ret <2 x i8> zeroinitializer
 ;
   %r = call <2 x i8> @llvm.fshr.v2i8(<2 x i8> zeroinitializer, <2 x i8> <i8 0, i8 undef>, <2 x i8> %shamt)
   ret <2 x i8> %r