[PATCH] D107850: [asan] Implemented custom calling convention similar to the one used by HWASan for X86.

[Evgenii Stepanov via Phabricator via llvm-commits]

eugenis added inline comments.


================
Comment at: llvm/include/llvm/IR/Intrinsics.td:1640
 
+def int_asan_check_memaccess :
+  Intrinsic<[],[llvm_ptr_ty, llvm_i8_ty, llvm_i8_ty],
----------------
vitalybuka wrote:
> kstoimenov wrote:
> > vitalybuka wrote:
> > > vitalybuka wrote:
> > > > PTAL at lvm.read_register.i32
> > > > 
> > > > How about:
> > > > 
> > > > llvm.asan.check.memaccess ->
> > > >   lvm.asan.check_read
> > > >   lvm.asan.check_write
> > > >   lvm.asan.kernel.check_read
> > > >   lvm.asan.kernel.check_write
> > > > 
> > > > Even better
> > > >   lvm.asan.check_read.{i8, i16, i32, ...}
> > > >   lvm.asan.check_write.{i8, i16, i32, ...}
> > > >   lvm.asan.kernel.check_read.{i8, i16, i32, ...}
> > > >   lvm.asan.kernel.check_write.{i8, i16, i32, ...}
> > > > 
> > > Looks like underscore is not used in intrinsic names, so essentially the same with dots.
> > Sounds good to me. I do the full expansion so there will be 20 intrinsics altogether. I will update the code and ping you when done. 
> @pcc @eugenis 
> WDYT, I think later we can do the same for HWASAN?
I don't see what these multiple intrinsics give us that a single memaccess one does not provide?

As long as access type and similar arguments are immediates.



================
Comment at: llvm/include/llvm/IR/Intrinsics.td:1642
+  Intrinsic<[],[llvm_ptr_ty, llvm_i8_ty, llvm_i8_ty],
+            [IntrInaccessibleMemOnly, ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
+
----------------
We've just removed IntrInaccessibleMemOnly from hwasan. This needs to alias shadow updates.



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  https://reviews.llvm.org/D107850/new/

https://reviews.llvm.org/D107850