[PATCH] D108372: [X86][SchedModels] Fix missing ReadAdvance for MULX and ADCX/ADOX (PR51494)

[Andrea Di Biagio via Phabricator via llvm-commits]

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Before this patch, instructions MULX32rm and MULX64rm were missing a ReadAdvance for the implicit read of register EDX/RDX.

This patch fixes the issue, and it also adds a ReadAdvance for the implicit read of EFLAGS in ADCX/ADOX.

This change also introduces a new SchedWrite for the MULX variants. By using those writes, we can get rid of most InstRW in the Zen models. The only exception is the Zen3 model, for which an InstRW is still required to override the RM variants of MULX.
Another minor advantage of using these new SchedWrites is that we can now correctly mark MULX as unsupported on models used by targets that don't feature BMI2.
While doing this minor refactoring, I noticed (and fixed) an inconsistency in the throughput numbers reported by zen1 models for MULX64. Specifically, the MULX64 variant didn't correctly declare resources, and it had an unrealistic throughput. That issue also affected the zen2 model (I suspect a copy-paste mistake; most definitions in zen2 seems copied straight from zen1 modulo a small rename of substring Zn to Zn2).
Anyway. Those new values now correctly match what is reported in the AMD SOG official document for family 17th.

Please let me know if OK to commit.

Thanks
-Andrea


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108372

Files:
  llvm/lib/Target/X86/X86InstrArithmetic.td
  llvm/lib/Target/X86/X86SchedBroadwell.td
  llvm/lib/Target/X86/X86SchedHaswell.td
  llvm/lib/Target/X86/X86SchedSandyBridge.td
  llvm/lib/Target/X86/X86SchedSkylakeClient.td
  llvm/lib/Target/X86/X86SchedSkylakeServer.td
  llvm/lib/Target/X86/X86Schedule.td
  llvm/lib/Target/X86/X86ScheduleAtom.td
  llvm/lib/Target/X86/X86ScheduleBdVer2.td
  llvm/lib/Target/X86/X86ScheduleBtVer2.td
  llvm/lib/Target/X86/X86ScheduleSLM.td
  llvm/lib/Target/X86/X86ScheduleZnver1.td
  llvm/lib/Target/X86/X86ScheduleZnver2.td
  llvm/lib/Target/X86/X86ScheduleZnver3.td
  llvm/test/tools/llvm-mca/X86/Haswell/adcx-adox-read-advance.s
  llvm/test/tools/llvm-mca/X86/Haswell/mulx-read-advance.s
  llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi2.s
  llvm/test/tools/llvm-mca/X86/Znver2/adcx-adox-read-advance.s
  llvm/test/tools/llvm-mca/X86/Znver2/mulx-read-advance.s
  llvm/test/tools/llvm-mca/X86/Znver2/resources-bmi2.s

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