[PATCH] D108354: Use v16i8 rather than v2i64 as the VT for memset expansion on AArch64.

[Owen Anderson via Phabricator via llvm-commits]

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This allows the instruction selector to realize that it can directly
broadcast the low byte of the memset value, rather than replicating
it to a 64-bit GPR before broadcasting.

This fixes PR50985.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108354

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/memset.ll


Index: llvm/test/CodeGen/AArch64/memset.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/memset.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-unknown-linux-gnu"
+
+; CHECK: memset_call:
+; CHECK-NOT: and
+; CHECK: dup
+; CHECK-NEXT: stp
+; CHECK-NEXT: stp
+; CHECK-NEXT: ret
+define void @memset_call(i8* %0, i32 %1) {
+  %3 = trunc i32 %1 to i8
+  call void @llvm.memset.p0i8.i64(i8* %0, i8 %3, i64 64, i1 false)
+  ret void
+}
+
+declare void @llvm.memset.p0i8.i64(i8*, i8, i64, i1 immarg)
+
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -12091,8 +12091,8 @@
   };
 
   if (CanUseNEON && Op.isMemset() && !IsSmallMemset &&
-      AlignmentIsAcceptable(MVT::v2i64, Align(16)))
-    return MVT::v2i64;
+      AlignmentIsAcceptable(MVT::v16i8, Align(16)))
+    return MVT::v16i8;
   if (CanUseFP && !IsSmallMemset && AlignmentIsAcceptable(MVT::f128, Align(16)))
     return MVT::f128;
   if (Op.size() >= 8 && AlignmentIsAcceptable(MVT::i64, Align(8)))


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