[PATCH] D108137: [AArch64][Global ISel] Add sext/zext improvements

Wed Aug 18 10:19:30 PDT 2021

paquette added inline comments.

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Comment at: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp:3160
+        Register Src0;
+        if (mi_match(I.getOperand(1).getReg(), MRI,
+                     m_Copy(m_GExtVecElt(m_Reg(Src0), m_SpecificICst(1))))) {
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It looks like the code here and the code in the `earlySelect` case for G_SEXT is very similar.

Would it be possible to factor some of it out into functions?

I could imagine an `emit` function which represents this patter, which takes an `IsSigned` parameter. Then you could choose e.g. `UMOV` or `SMOV` based off of that.

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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/legalise-sext-zext.mir:1
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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Can we rename this test to something like "select-extract-vector-elt-with-extend" or something? It's not really a legalisation test.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108137/new/

https://reviews.llvm.org/D108137